SLVSGV9 august   2023 DRV8213

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Diagrams
    7. 7.7 Typical Operating Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 External Components
    4. 8.4 Feature Description
      1. 8.4.1 Bridge Control
      2. 8.4.2 Current Sense and Regulation (IPROPI)
        1. 8.4.2.1 Current Sensing and Current Mirror Gain Selection
        2. 8.4.2.2 Current Regulation
      3. 8.4.3 Hardware Stall Detection
      4. 8.4.4 Protection Circuits
        1. 8.4.4.1 Overcurrent Protection (OCP)
        2. 8.4.4.2 Thermal Shutdown (TSD)
        3. 8.4.4.3 VM Undervoltage Lockout (UVLO)
    5. 8.5 Device Functional Modes
      1. 8.5.1 Active Mode
      2. 8.5.2 Low-Power Sleep Mode
      3. 8.5.3 Fault Mode
    6. 8.6 Pin Diagrams
      1. 8.6.1 Logic-Level Inputs
      2. 8.6.2 Tri-Level Input
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Brushed DC Motor
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Motor Voltage
          2. 9.2.1.2.2 Motor Current
        3. 9.2.1.3 Stall Detection
          1. 9.2.1.3.1 Detailed Design Procedure
            1. 9.2.1.3.1.1 Hardware Stall Detection Application Description
              1. 9.2.1.3.1.1.1 Hardware Stall Detection Timing
              2. 9.2.1.3.1.1.2 Hardware Stall Threshold Selection
            2. 9.2.1.3.1.2 Software Stall Detection Application Description
              1. 9.2.1.3.1.2.1 Software Stall Detection Timing
              2. 9.2.1.3.1.2.2 Software Stall Threshold Selection
        4. 9.2.1.4 Application Curves
        5. 9.2.1.5 Thermal Performance
          1. 9.2.1.5.1 Steady-State Thermal Performance
          2. 9.2.1.5.2 Transient Thermal Performance
  11. 10Power Supply Recommendations
    1. 10.1 Bulk Capacitance
  12. 11Layout
    1. 11.1 Layout Guidelines
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4.2.2 Current Regulation

The DRV8213 device integrates current regulation using a fixed off-time current chopping scheme, as shown in Figure 8-6. This allows the device to limit the output current in case of motor stall, high torque, or other high current load events without involvement from the external controller.

GUID-9B187006-B380-45F6-8E6B-8479F876F10D-low.svgFigure 8-6 Off-Time Current-Regulation

The current chopping threshold (ITRIP) is set through a combination of the VREF voltage (VVREF) and IPROPI output resistor (RIPROPI). This is done by comparing the voltage drop across the external RIPROPI resistor to VVREF with an internal comparator.

Equation 3. ITRIP (A) x AIPROPI (μA/A) = VVREF (V) / RIPROPI (Ω)
For example, if VVREF = 3.3 V, RIPROPI = 8.06 kΩ, and AIPROPI = 205 μA/A, then ITRIP will be approximately 2 A.

VVREF must be lower than VVM by at least 1.25 V. The maximum recommended value of VVREF is 3.3 V.

As mentioned before, for DSG package, VVREF is internally fixed at 510 mV. For RTE package as well, if SMODE is left OPEN, VVREF is internally fixed at 510 mV.

The fixed off-time current chopping scheme supports up to 100% duty cycle current regulation since the H-bridge automatically enables after the tOFF period and does not require a new control input edge on the INx pins to reset the outputs. When the motor current exceeds the ITRIP threshold, the outputs will enter a current chopping mode with a fixed off time (tOFF). During tOFF, the H-bridge enters a brake/low-side slow decay state (both low-side MOSFETs ON) for tOFF duration after IOUT exceeds ITRIP. After tOFF, the outputs re-enable according to the control inputs if IOUT is less than ITRIP. If IOUT is still greater than ITRIP, the H-bridge enters another period of brake/low-side slow decay for tOFF after a drive time of tBLANK.. If the state of the INx control pins changes during the tOFF time, the remainder of the tOFF time is ignored, and the outputs will again follow the inputs.

The ITRIP comparator has both a blanking time (tBLK) and a deglitch time (tDEG). The internal blanking time helps to prevent voltage and current transients during output switching from effecting the current regulation. These transients may be caused by a capacitor inside the motor or on the connections to the motor terminals. The internal deglitch time ensures that transient conditions do not prematurely trigger the current regulation. In certain cases where the transient conditions are longer than the deglitch time, placing a 10-nF capacitor on the IPROPI pin, close to the device, will help filter the transients on IPROPI output so current regulation does not prematurely trigger. The capacitor value can be adjusted as needed, however large capacitor values may slow down the response time of the current regulation circuitry.

The IMODE pin determines the behavior of current regulation in the motor driver. When IMODE is logic low (IMODE = 0), current regulation is disabled. When IMODE is floating (IMODE =Z), the device only performs current regulation during the tINRUSH time when stall detection is enabled. This functionality relates to the hardware stall detection feature described in Section 8.4.3. When IMODE is logic high (IMODE = 1), current regulation is enabled at all times. Table 8-4 summarizes the IMODE pin settings.

Table 8-4 IMODE configuration
IMODEnSTALLDescription

Low

XNo current regulation at any time
High-Z

Low

Current regulation at all times
High-Z

High

Current regulation during tINRUSH only

High

XCurrent regulation at all times