SLVSG23C December 2021 – August 2022 DRV8243-Q1
PRODUCTION DATA
The SPI variant allows control of the bridge through the specific register bits, S_DRVOFF, S_DRVOFF2, S_EN_IN1, S_PH_IN2 in the SPI_IN register, provided the SPI_IN register has been unlocked. The user can unlock this register by writing the right combination to the SPI_IN_LOCK bits in the COMMAND register.
Additionally, the user can configure between an AND / OR logic combination of each of external input pin with their equivalent register bit in the SPI_IN register. This logical configuration is done through the equivalent selects bits in the CONFIG4 register:
This logical combination offers more configurability to the user as shown in the table below.
Example | CONFIG4: xxx_SEL Bit | PIN status | SPI_IN Bit Status | Comment |
---|---|---|---|---|
DRVOFF as redundant shutoff | DRVOFF_SEL = 1’b0 | DRVOFF active | S_DRVOFF active | Either DRVOFF pin = 1 or S_DRVOFF bit = 1 will shutoff the output |
Pin only control | DRVOFF_SEL = 1’b1 | DRVOFF active | S_DRVOFF = 1'b1 | Only DRVOFF pin function is available |
Register only control | PH_IN2_SEL bit = 1’b0 | PH/IN2 - short to GND or float | S_PH_IN2 active | PH (direction) will be controlled by the register bit alone |