SLVSD12D May 2015 – July 2019 DRV8305-Q1
PRODUCTION DATA.
The DRV8305-Q1 gate driver uses a complimentary push-pull topology for both the high-side and the low-side gate drivers. Both the high-side (GHx to SHx) and the low-side (GLx to SLx) are implemented as floating gate drivers in order to tolerate switching transients from the half-bridges. The high-side and low-side gate drivers use a highly adjustable current control scheme in order to allow the DRV8305-Q1 to adjust the VDS slew rate of the external MOSFETs without the need for additional components. The scheme also incorporates a mechanism for detecting issues with the gate drive output to the power MOSFETs during operation. This scheme and its application benefits are outlined below as well as in the Understanding IDRIVE and TDRIVE in TI Motor Gate Drivers application report.