SLOSE51A
June 2020 – December 2020
DRV8428E
ADVANCE INFORMATION
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
5.1
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.5.1
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagrams
7.3
Feature Description
7.3.1
PWM Motor Drivers
7.3.2
Bridge Control
7.3.3
Current Regulation, Off-time and Decay Modes
7.3.3.1
Mixed Decay
7.3.3.2
Smart tune Dynamic Decay
7.3.3.3
Smart tune Ripple Control
7.3.3.4
Blanking time
7.3.4
Linear Voltage Regulators
7.3.5
Logic and Seven-Level Pin Diagrams
7.3.6
Protection Circuits
7.3.6.1
VM Undervoltage Lockout (UVLO)
7.3.6.2
Overcurrent Protection (OCP)
7.3.6.3
Thermal Shutdown (OTSD)
7.3.6.4
Fault Condition Summary
7.4
Device Functional Modes
7.4.1
Sleep Mode (nSLEEP = 0)
7.4.2
Operating Mode (nSLEEP = 1)
7.4.3
Functional Modes Summary
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Current Regulation
8.2.2.2
Power Dissipation and Thermal Calculation
8.2.2.2.1
Application Curves
8.3
Alternate Application
8.3.1
Design Requirements
8.3.2
Detailed Design Procedure
8.3.2.1
Current Regulation
8.3.2.1.1
Stepper Motor Speed
8.3.2.1.1.1
Decay Modes
9
Power Supply Recommendations
9.1
Bulk Capacitance
10
Layout
10.1
Layout Guidelines
10.1.1
Layout Example
11
Device and Documentation Support
11.1
Related Links
11.2
Receiving Notification of Documentation Updates
11.3
Community Resources
11.4
Trademarks
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RTE|16
MPQF149D
PWP|16
MPDS371A
Thermal pad, mechanical data (Package|Pins)
RTE|16
QFND525B
PWP|16
PPTD023AC
Orderable Information
slose51a_oa
slose51a_pm
8.2.2
Detailed Design Procedure