SLOSE51A June 2020 – December 2020 DRV8428E
ADVANCE INFORMATION
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
POWER SUPPLIES (VM, DVDD) | ||||||
IVM | VM operating supply current | nSLEEP = 1, No motor load |
3.8 |
5.6 | mA | |
IVMQ | VM sleep mode supply current | nSLEEP = 0 | 2 | 4 | μA | |
tSLEEP | Sleep time | nSLEEP = 0 to sleep-mode | 120 | μs | ||
tWAKE | Wake-up time | nSLEEP = 1 to output transition | 0.8 | 1.2 | ms | |
tON | Turn-on time | VM > UVLO to output transition | 0.8 | 1.2 | ms | |
VDVDD | Internal regulator voltage | No external load, 6 V < VVM < 33 V | 4.5 | 5 | 5.5 | V |
No external load, VVM = 4.2 V |
3.9 |
4.05 |
V | |||
LOGIC-LEVEL INPUTS (APH, AEN, BPH, BEN, AIN1, AIN2, BIN1, BIN2, nSLEEP) | ||||||
VIL | Input logic-low voltage | 0 | 0.6 | V | ||
VIH | Input logic-high voltage | 1.5 | 5.5 | V | ||
VHYS | Input logic hysteresis | 150 | mV | |||
IIL | Input logic-low current | VIN = 0 V | –1 | 1 | μA | |
IIH | Input logic-high current | VIN = 5 V | 100 | μA | ||
tPD | Propagation delay | xPH, xEN, xINx input to current change | 750 | ns | ||
SEVEN-LEVEL INPUT (DECAY/TOFF) | ||||||
VI1 | Voltage level 1 | Tied to GND | 0 | 0.1 | V | |
VI2 | Voltage level 2 | 14.7kΩ ± 1% to GND | 0.2 | 0.35 | V | |
VI3 | Voltage level 3 | 44.2kΩ ± 1% to GND | 0.55 | 0.8 | V | |
VI4 | Voltage level 4 | 100kΩ ± 1% to GND | 1 | 1.25 | V | |
VI5 | Voltage level 5 | 249kΩ ± 1% to GND | 1.5 | 1.75 | V | |
VI6 | Voltage level 6 | Hi-Z | 2.1 | 2.4 | V | |
VI7 | Voltage level 7 | Tied to DVDD | 3 | 5.5 | V | |
IO | Output pull-up current | 22.5 | μA | |||
MOTOR DRIVER OUTPUTS (AOUT1, AOUT2, BOUT1, BOUT2) | ||||||
RDS(ONH) | High-side FET on resistance | TJ = 25 °C, IO = -0.5 A | 750 |
875 | mΩ | |
TJ = 125 °C, IO = -0.5 A | 1130 | 1350 | mΩ | |||
TJ = 150 °C, IO = -0.5 A | 1250 | 1450 | mΩ | |||
RDS(ONL) | Low-side FET on resistance | TJ = 25 °C, IO = 0.5 A | 750 |
875 | mΩ | |
TJ = 125 °C, IO = 0.5 A | 1130 | 1350 | mΩ | |||
TJ = 150 °C, IO = 0.5 A | 1250 | 1450 | mΩ | |||
tSR | Output slew rate | VM = 24V, IO = 0.5 A, Between 10% and 90% | 240 | V/µs | ||
PWM CURRENT CONTROL (VREFA, VREFB) | ||||||
KV | Transimpedance gain | VREF = 3 V | 2.805 | 3 | 3.195 | V/A |
tOFF | PWM off-time, mixed 30% decay | DECAY/TOFF = 14.7kΩ to GND | 7 | μs | ||
DECAY/TOFF = 44.2kΩ to GND | 16 | |||||
DECAY/TOFF = 100kΩ to GND | 32 | |||||
PWM off-time, smart tune dynamic decay | DECAY/TOFF = 249kΩ to GND | 7 | ||||
DECAY/TOFF = Hi-Z | 16 | |||||
DECAY/TOFF = DVDD | 32 | |||||
ΔITRIP | Current trip accuracy | IO = 1 A, 10% to 20% current setting | –15 | 15 | % | |
IO = 1 A, 20% to 67% current setting | –10 | 10 | ||||
IO = 1 A, 68% to 100% current setting | -6 |
6 | ||||
IO,CH | AOUT and BOUT current matching | IO = 1 A | –2.5 | 2.5 | % | |
PROTECTION CIRCUITS | ||||||
VUVLO | VM UVLO lockout | VM falling, UVLO falling | 3.8 | 3.95 | 4.05 | V |
VM rising, UVLO rising | 3.9 | 4.05 | 4.15 | |||
VUVLO,HYS | Undervoltage hysteresis | Rising to falling threshold | 100 | mV | ||
IOCP | Overcurrent protection | Current through any FET | 1.7 | A | ||
tOCP | Overcurrent deglitch time | 1.8 | μs | |||
tRETRY | Overcurrent retry time |
4 |
ms | |||
TOTSD | Thermal shutdown | Die temperature TJ | 150 | 165 | 180 | °C |
THYS_OTSD | Thermal shutdown hysteresis | Die temperature TJ | 20 | °C |