SLOSE51A June   2020  – December 2020 DRV8428E

ADVANCE INFORMATION  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
    1. 5.1 Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
      1. 6.5.1 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 PWM Motor Drivers
      2. 7.3.2 Bridge Control
      3. 7.3.3 Current Regulation, Off-time and Decay Modes
        1. 7.3.3.1 Mixed Decay
        2. 7.3.3.2 Smart tune Dynamic Decay
        3. 7.3.3.3 Smart tune Ripple Control
        4. 7.3.3.4 Blanking time
      4. 7.3.4 Linear Voltage Regulators
      5. 7.3.5 Logic and Seven-Level Pin Diagrams
      6. 7.3.6 Protection Circuits
        1. 7.3.6.1 VM Undervoltage Lockout (UVLO)
        2. 7.3.6.2 Overcurrent Protection (OCP)
        3. 7.3.6.3 Thermal Shutdown (OTSD)
        4. 7.3.6.4 Fault Condition Summary
    4. 7.4 Device Functional Modes
      1. 7.4.1 Sleep Mode (nSLEEP = 0)
      2. 7.4.2 Operating Mode (nSLEEP = 1)
      3. 7.4.3 Functional Modes Summary
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Current Regulation
        2. 8.2.2.2 Power Dissipation and Thermal Calculation
          1. 8.2.2.2.1 Application Curves
    3. 8.3 Alternate Application
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
        1. 8.3.2.1 Current Regulation
          1. 8.3.2.1.1 Stepper Motor Speed
            1. 8.3.2.1.1.1 Decay Modes
  9. Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Power Dissipation and Thermal Calculation

The output current and power dissipation capabilities of the device are heavily dependent on the PCB design and external system conditions. This section provides some guidelines for calculating these values.

Total power dissipation (PTOT) for the device is composed of three main components. These are the power MOSFET RDS(ON) (conduction) losses, the power MOSFET switching losses and the quiescent supply current dissipation. While other factors may contribute additional power losses, these other items are typically insignificant compared to the three main items.

PTOT = PCOND + PSW + PQ

PCOND for each brushed-DC motor can be calculated from the device RDS(ON) and regulated output current (IREG). Assuming same IREG for both brushed-DC motors,

PCOND = 2 x (IREG)2 x (RDS(ONH) + RDS(ONL))

It should be noted that RDS(ON) has a strong correlation with the device temperature. A curve showing the normalized RDS(ON) with temperature can be found in the Typical Characteristics curves.

PCOND = 2 x (0.5-A)2 x (0.75-Ω + 0.75-Ω) = 0.75-W

PSW can be calculated from the nominal supply voltage (VM), regulated output current (IREG), switching frequency (fPWM) and the device output rise (tRISE) and fall (tFALL) time specifications.

PSW = 2 x (PSW_RISE + PSW_FALL)

PSW_RISE = 0.5 x VM x IREG x tRISE x fPWM

PSW_FALL = 0.5 x VM x IREG x tFALL x fPWM

PSW_RISE = 0.5 x 24 V x 0.5 A x 100 ns x 40 kHz = 0.024 W

PSW_FALL = 0.5 x 24 V x 1.5 A x 100 ns x 40 kHz = 0.024 W

PSW = 2 x (0.024W + 0.024W) = 0.096 W

PQ can be calculated from the nominal supply voltage (VM) and the IVM current specification.

PQ = VM x IVM = 24 V x 3.8 mA = 0.0912 W

The total power dissipation (PTOT) is calculated as the sum of conduction loss, switching loss and the quiescent power loss.

PTOT = PCOND + PSW + PQ = 0.75-W + 0.096-W + 0.0912-W = 0.9372-W

For an ambient temperature of TA and total power dissipation (PTOT), the junction temperature (TJ) is calculated as

TJ = TA + (PTOT x RθJA)

Considering a JEDEC standard 4-layer PCB, the junction-to-ambient thermal resistance (RθJA) is 46.4 °C/W for the HTSSOP package, 47 °C/W for the WQFN package and 90.6 °C/W for the TSOT package.

Assuming 25°C ambient temperature, the junction temperature for the HTSSOP package is calculated as shown below -

Equation 2. TJ = 25°C + (0.9372-W x 46.4°C/W) = 68.49 °C

The junction temperature for the WQFN package is calculated as shown below -

Equation 2. TJ = 25°C + (0.9372-W x 47°C/W) = 69.05 °C

Therefore, the HTSSOP and the WQFN packages result in almost identical junction temperature. It should be ensured that the device junction temperature is within the specified operating region.