SLVSA06K October   2009  – January 2022 DRV8824

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Motor Drivers
      2. 7.3.2 Current Regulation
      3. 7.3.3 Decay Mode
      4. 7.3.4 Blanking Time
      5. 7.3.5 Microstepping Indexer
      6. 7.3.6 nRESET, nENBL and nSLEEP Operation
      7. 7.3.7 Protection Circuits
        1. 7.3.7.1 Overcurrent Protection (OCP)
        2. 7.3.7.2 Thermal Shutdown (TSD)
        3. 7.3.7.3 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 STEP/DIR Interface
      2. 7.4.2 Microstepping
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Stepper Motor Speed
        2. 8.2.2.2 Current Regulation
        3. 8.2.2.3 Decay Modes
      3. 8.2.3 Application Curves
  9. Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
    3. 9.3 Thermal Considerations
    4. 9.4 Power Dissipation
    5. 9.5 Heatsinking
  10. 10Device and Documentation Support
    1. 10.1 Community Resources
    2. 10.2 Trademarks
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RHD|28
  • PWP|28
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Microstepping Indexer

Built-in indexer logic in the DRV8824 allows a number of different stepping configurations. The MODE0 through MODE2 pins are used to configure the stepping format, as shown in Table 7-1.

Table 7-1 Stepping Format
MODE2MODE1MODE0STEP MODE
000Full step (2-phase excitation) with 71% current
0011/2 step (1-2 phase excitation)
0101/4 step (W1-2 phase excitation)
0118 microsteps/step
10016 microsteps/step
10132 microsteps/step
11032 microsteps/step
11132 microsteps/step

Table 7-2 shows the relative current and step directions for different settings of MODEx. At each rising edge of the STEP input, the indexer travels to the next state in the table. The direction is shown with the DIR pin high; if the DIR pin is low, the sequence is reversed. Positive current is defined as xOUT1 = positive with respect to xOUT2.

Note that if the step mode is changed while stepping, the indexer advances to the next valid state for the new MODEx setting at the rising edge of STEP.

The home state is 45°. This state is entered at power-up or application of nRESET. This is shown in Table 7-2 by the shaded cells. The logic inputs DIR, STEP, nRESET, and MODEx have an internal pulldown resistors of
100 kΩ

Table 7-2 Relative Current and Step Directions
1/32 STEP1/16 STEP1/8 STEP1/4 STEP1/2 STEPFULL STEP 70%WINDING CURRENT
A
WINDING CURRENT
B
ELECTRICAL ANGLE
11111100%0%0
2100%5%3
32100%10%6
499%15%8
53298%20%11
697%24%14
7496%29%17
894%34%20
953292%38%23
1090%43%25
11688%47%28
1286%51%31
137483%56%34
1480%60%37
15877%63%39
1674%67%42
179532171%71%45
1867%74%48
191063%77%51
2060%80%53
2111656%83%56
2251%86%59
231247%88%62
2443%90%65
25137438%92%68
2634%94%70
271429%96%73
2824%97%76
2915820%98%79
3015%99%82
311610%100%84
325%100%87
33179530%100%90
34–5%100%93
3518–10%100%96
36–15%99%98
371910–20%98%101
38–24%97%104
3920–29%96%107
40–34%94%110
4121116–38%92%113
42–43%90%115
4322–47%88%118
44–51%86%121
452312–56%83%124
46–60%80%127
4724–63%77%129
48–67%74%132
492513742–71%71%135
50–74%67%138
5126–77%63%141
52–80%60%143
532714–83%56%146
54–86%51%149
5528–88%47%152
56–90%43%155
5729158–92%38%158
58–94%34%160
5930–96%29%163
60–97%24%166
613116–98%20%169
62–99%15%172
6332–100%10%174
64–100%5%177
65331795–100%0%180
66–100%–5%183
6734–100%–10%186
68–99%–15%188
693518–98%–20%191
70–97%–24%194
7136–96%–29%197
72–94%–34%200
73371910–92%–38%203
74–90%–43%205
7538–88%–47%208
76–86%–51%211
773920–83%–56%214
78–80%–60%217
7940–77%–63%219
80–74%–67%222
8141211163–71%–71%225
82–67%–74%228
8342–63%–77%231
84–60%–80%233
854322–56%–83%236
86–51%–86%239
8744–47%–88%242
88–43%–90%245
89452312–38%–92%248
90–34%–94%250
9146–29%–96%253
92–24%–97%256
934724–20%–98%259
94–15%–99%262
9548–10%–100%264
96–5%–100%267
9749251370%–100%270
985%–100%273
995010%–100%276
10015%–99%278
101512620%–98%281
10224%–97%284
1035229%–96%287
10434%–94%290
10553271438%–92%293
10643%–90%295
1075447%–88%298
10851%–86%301
109552856%–83%304
11060%–80%307
1115663%–77%309
11267%–74%312
1135729158471%–71%315
11474%–67%318
1155877%–63%321
11680%–60%323
117593083%–56%326
11886%–51%329
1196088%–47%332
12090%–43%335
12161311692%–38%338
12294%–34%340
1236296%–29%343
12497%–24%346
125633298%–20%349
12699%–15%352
12764100%–10%354
128100%–5%357