SLVSDA4C January 2017 – March 2020 DRV8886
PRODUCTION DATA.
An linear voltage regulator is integrated into the DRV8886 device. The DVDD regulator can be used to provide a reference voltage. For proper operation, bypass the DVDD pin to GND using a ceramic capacitor.
The DVDD output is nominally 3.3 V. When the DVDD LDO current load exceeds 1 mA, the output voltage drops significantly.
The AVDD pin also requires a bypass capacitor to GND. This LDO is for DRV8886 internal use only.
If a digital input must be tied permanently high (that is, Mx, DECAY or TRQ), tying the input to the DVDD pin instead of an external regulator is preferred. This method saves power when the VM pin is not applied or in sleep mode: the DVDD regulator is disabled and current does not flow through the input pulldown resistors. For reference, logic level inputs have a typical pulldown of 100 kΩ, and tri-level inputs have a typical pulldown of 60 kΩ.