SLVSDA4C January   2017  – March 2020 DRV8886

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Simplified Schematic
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Indexer Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Stepper Motor Driver Current Ratings
        1. 7.3.1.1 Peak Current Rating
        2. 7.3.1.2 rms Current Rating
        3. 7.3.1.3 Full-Scale Current Rating
      2. 7.3.2  PWM Motor Drivers
      3. 7.3.3  Microstepping Indexer
      4. 7.3.4  Current Regulation
      5. 7.3.5  Controlling RREF With an MCU DAC
        1. 7.3.5.1 Various Sources of Error
          1. 7.3.5.1.1 VRREF, ARREF, and RREF Error
          2. 7.3.5.1.2 VDAC Error
        2. 7.3.5.2 Application-Specific Error Calculations
      6. 7.3.6  Decay Modes
        1. 7.3.6.1 Mode 1: Slow Decay for Increasing Current, Mixed Decay for Decreasing Current
        2. 7.3.6.2 Mode 2: Mixed Decay for Increasing and Decreasing Current
        3. 7.3.6.3 Mode 3: Slow Decay for Increasing and Decreasing Current
      7. 7.3.7  Blanking Time
      8. 7.3.8  Charge Pump
      9. 7.3.9  Linear Voltage Regulators
      10. 7.3.10 Logic and Multi-Level Pin Diagrams
      11. 7.3.11 Protection Circuits
        1. 7.3.11.1 VM Undervoltage Lockout (UVLO)
        2. 7.3.11.2 VCP Undervoltage Lockout (CPUV)
        3. 7.3.11.3 Overcurrent Protection (OCP)
        4. 7.3.11.4 Thermal Shutdown (TSD)
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Stepper Motor Speed
        2. 8.2.2.2 Current Regulation
        3. 8.2.2.3 Decay Modes
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

VDAC Error

Using the same methodology along with Equation 3 and Equation 4, the VDAC error contribution to IFS can be shown. This is done by removing the error from VRREF, ARREF, and RREF. The following examples show the VDAC error value with a 3% and 10% variation.

Table 11. Worst Case Calculation—VDAC 3% and 10%, IFS Error at 1 A

Parameter Minimum Typical Maximum
3% ERROR
VDAC 0.3983 0.4107 0.423
ARREF 30000 30000 30000
VRREF 1.232 1.232 1.232
RREF 20000 20000 20000
IFS (mA) 985.08 1000 1015.07
Error (%) –1.50 1.50
10% ERROR
VDAC 0.3696 0.4107 0.4517
ARREF 30000 30000 30000
VRREF 1.232 1.232 1.232
RREF 20000 20000 20000
IFS (mA) 950.08 1000 1050.07
Error (%) –5.00 5.00

Table 12. Worst Case Calculation—VDAC 3% and 10%, IFS Error at 400 mA

Parameter Minimum Typical Maximum
3% ERROR
VDAC 0.8764 0.9035 0.9306
ARREF 30000 30000 31 900
VRREF 1.232 1.232 1.232
RREF 20000 20000 20000
IFS (mA) 367.18 400 433.17
Error (%) –8.25 8.25
10% ERROR
VDAC 0.8131 0.9035 0.9938
ARREF 30000 30000 30000
VRREF 1.232 1.232 1.232
RREF 20000 20000 20000
IFS (mA) 290.19 400 510.16
Error (%) –27.48 27.48

Table 13. Worst Case Calculation—VDAC 3% and 10%, IFS Error at 200 mA

Parameter Minimum Typical Maximum
3% ERROR
VDAC 1.0357 1.0677 1.0998
ARREF 30000 30000 30000
VRREF 1.232 1.232 1.232
RREF 20000 20000 20000
IFS (mA) 161.22 200 239.20
Error (%) –19.48 19.48
10% ERROR
VDAC 0.9610 1.0677 1.1745
ARREF 30000 30000 30000
VRREF 1.232 1.232 1.232
RREF 20000 20000 20000
IFS (mA) 70.23 200 330.19
Error (%) –64.92 64.92

These tables show that as the variation in VDAC increases, the error percentage increases. Also, for very low currents, the error percentage increases greatly because of the VDAC proximity to the VRREF voltage.