SLOSE71
April 2020 – December 2020
DRV8955
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.5.1
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagrams
7.3
Feature Description
7.3.1
Configuration Options and Bridge Control
7.3.2
Current Regulation
7.3.3
Charge Pump
7.3.4
Linear Voltage Regulators
7.3.5
Logic and Quad-Level Pin Diagrams
7.3.5.1
nFAULT Pin
7.3.6
Protection Circuits
7.3.6.1
VM Undervoltage Lockout (UVLO)
7.3.6.2
VCP Undervoltage Lockout (CPUV)
7.3.6.3
Overcurrent Protection (OCP)
7.3.6.4
Thermal Shutdown (OTSD)
Fault Condition Summary
7.4
Device Functional Modes
7.4.1
Sleep Mode (nSLEEP = 0)
7.4.2
Operating Mode (nSLEEP = 1)
7.4.3
nSLEEP Reset Pulse
Functional Modes Summary
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Current Regulation
8.2.2.2
Power Dissipation and Thermal Calculation
8.2.2.3
Application Curves
9
Power Supply Recommendations
9.1
Bulk Capacitance Sizing
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RGE|24
MPQF124G
PWP|28
MPDS373B
Thermal pad, mechanical data (Package|Pins)
RGE|24
QFND008AA
Orderable Information
slose71_oa
slose71_pm
8.2
Typical Application
The following design procedure can be used to configure the DRV8955. In this application, the device will be used to drive four solenoid loads.
Figure 8-1
Typical Application Schematic