SLOSE71 April   2020  – December 2020 DRV8955

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
      1. 6.5.1 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Configuration Options and Bridge Control
      2. 7.3.2 Current Regulation
      3. 7.3.3 Charge Pump
      4. 7.3.4 Linear Voltage Regulators
      5. 7.3.5 Logic and Quad-Level Pin Diagrams
        1. 7.3.5.1 nFAULT Pin
      6. 7.3.6 Protection Circuits
        1. 7.3.6.1 VM Undervoltage Lockout (UVLO)
        2. 7.3.6.2 VCP Undervoltage Lockout (CPUV)
        3. 7.3.6.3 Overcurrent Protection (OCP)
        4. 7.3.6.4 Thermal Shutdown (OTSD)
        5.       Fault Condition Summary
    4. 7.4 Device Functional Modes
      1. 7.4.1 Sleep Mode (nSLEEP = 0)
      2. 7.4.2 Operating Mode (nSLEEP = 1)
      3. 7.4.3 nSLEEP Reset Pulse
      4.      Functional Modes Summary
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Current Regulation
        2. 8.2.2.2 Power Dissipation and Thermal Calculation
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance Sizing
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.1 Configuration Options and Bridge Control

The MODE pin configures the half-bridges such that one, two or four solenoid loads can be driven by the device. Higher load currents can be supported by paralleling half-bridges. Table 7-2 shows the four possible settings -

Table 7-2 DRV8955 Configuration Options
MODENumber of Half-bridgesIndependent High-z ControlRdsON (HS + LS)

Maximum ITRIP

Input Control PinsCurrent Control
0FourNo330 mΩ

2.5 A

IN1, IN2, IN3, IN4VREF12 controls the ITRIP for OUT1 and OUT2, VREF34 controls the ITRIP for OUT3 and OUT4.
1Two (Connect OUT1 and OUT2 together, and OUT3 and OUT4 together)No160 mΩ

5 A

IN2 controls OUT1 and OUT2, IN4 controls OUT3 and OUT4VREF12 controls the ITRIP for OUT1 and OUT2, VREF34 controls the ITRIP for OUT3 and OUT4.
Hi-zOne (connect all four OUT pins together)No80 mΩ

10 A

IN4 controls the combined outputVREF12 must be shorted to VREF34 to control the ITRIP for output load.

330kΩ to GND

Four (independent High-z)

Yes330 mΩ

No ITRIP control available.

IN1, IN2, IN3, IN4, EN1, EN2, EN3, EN4

The current for each output has to be controlled by the input PWM pulse width. The VREF and TOFF pins are reassigned as enable (ENx) pins in this mode.

The INx input pins directly control the state (high or low) of the OUTx outputs. When MODE pin is connected to a 330k resistor to GND, the ENx input pins enable or disable the OUTx drivers, as shown below.

Table 7-3 DRV8955 H-Bridge Logic (for MODE = 0, 1 or Hi-Z)
nSLEEPINxOUTxDESCRIPTION
0XHi-ZSleep mode; Half-bridge disabled (Hi-Z)
10LOUTx Low-side ON
11HOUTx High-side ON
Table 7-4 DRV8955 H-Bridge Logic (for MODE = 330k to GND)
nSLEEPINx

ENx

OUTxDESCRIPTION
0X

X

Hi-ZSleep mode; Half-bridge disabled (Hi-Z)

1

X

0

Hi-Z

Individual outputs disabled (Hi-Z)

10

1

LOUTx Low-side ON
11

1

HOUTx High-side ON

When MODE pin is connected to a 330k resistor to GND, the inputs can also be used for PWM control of, for example, the speed of a DC motor. When controlling a winding with PWM, when the drive current is interrupted, the inductive nature of the motor requires that the current must continue to flow. This is called recirculation current. To handle this recirculation current, the H-bridge can operate in two different states, fast decay or slow decay. In fast decay mode, the H-bridge is disabled and recirculation current flows through the body diodes; in slow decay, the motor winding is shorted.

To PWM using fast decay, the PWM signal is applied to the ENx pin; to use slow decay, the PWM signal is applied to the INx pin. The following table is an example of driving a DC motor using OUT1 and OUT2 as an H-bridge:

Table 7-5 PWM Function
IN1EN1

IN2

EN2

FUNCTION

PWM

1

0

1

Forward PWM, slow decay

0

1

PWM

1

Reverse PWM, slow decay

1

PWM

0

PWM

Forward PWM, fast decay

0

PWM

1

PWM

Reverse PWM, fast decay