SLVSHN2 July   2024 DRV8962-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6Detailed Description
    1. 6.1  Overview
    2. 6.2  Functional Block Diagram
    3. 6.3  Feature Description
    4. 6.4  Independent Half-bridge Operation
    5. 6.5  Current Sensing and Regulation
      1. 6.5.1 Current Sensing and Feedback
      2. 6.5.2 Current Sensing with External Resistor
      3. 6.5.3 Current Regulation
    6. 6.6  Charge Pump
    7. 6.7  Linear Voltage Regulator
    8. 6.8  VCC Voltage Supply
    9. 6.9  Logic Level Pin Diagram
    10. 6.10 Protection Circuits
      1. 6.10.1 VM Undervoltage Lockout (UVLO)
      2. 6.10.2 VCP Undervoltage Lockout (CPUV)
      3. 6.10.3 Logic Supply Power on Reset (POR)
      4. 6.10.4 Overcurrent Protection (OCP)
      5. 6.10.5 Thermal Shutdown (OTSD)
      6. 6.10.6 nFAULT Output
      7. 6.10.7 Fault Condition Summary
    11. 6.11 Device Functional Modes
      1. 6.11.1 Sleep Mode
      2. 6.11.2 Operating Mode
      3. 6.11.3 nSLEEP Reset Pulse
      4. 6.11.4 Functional Modes Summary
  8. 7Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Driving Solenoid Loads
        1. 7.1.1.1 Solenoid Driver Typical Application
        2. 7.1.1.2 Thermal Calculations
          1. 7.1.1.2.1 Power Loss Calculations
          2. 7.1.1.2.2 Junction Temperature Estimation
        3. 7.1.1.3 Application Performance Plots
      2. 7.1.2 Driving Stepper Motors
        1. 7.1.2.1 Stepper Driver Typical Application
        2. 7.1.2.2 Power Loss Calculations
        3. 7.1.2.3 Junction Temperature Estimation
      3. 7.1.3 Driving Brushed-DC Motors
        1. 7.1.3.1 Brushed-DC Driver Typical Application
        2. 7.1.3.2 Power Loss Calculation
        3. 7.1.3.3 Junction Temperature Estimation
        4. 7.1.3.4 Driving Single Brushed-DC Motor
      4. 7.1.4 Driving Thermoelectric Coolers (TEC)
      5. 7.1.5 Driving Brushless DC Motors
    2. 7.2 Package Thermal Considerations
      1. 7.2.1 Thermal Performance
        1. 7.2.1.1 Steady-State Thermal Performance
        2. 7.2.1.2 Transient Thermal Performance
      2. 7.2.2 PCB Material Recommendation
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Bulk Capacitance
      2. 7.3.2 Power Supplies
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8Device and Documentation Support
    1. 8.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9Mechanical, Packaging, and Orderable Information
    1. 9.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.1.4 Driving Thermoelectric Coolers (TEC)

Thermoelectric coolers (TEC) work according to the Peltier effect. When a voltage is applied across the TEC, a DC current flows through the junction of the semiconductors, causing a temperature difference. Heat is transferred from one side of the TEC to the other. This creates a “hot” and a “cold” side of the TEC element. If the DC current is reversed, the hot and cold sides reverse as well.

A common way of modulating the current through the TEC is to use PWM driving and make the average current change by varying the ON and OFF duty cycles. To allow both heating and cooling from a single supply, a H-bridge topology is required. The DRV8962-Q1 can drive two H-bridges to drive two TECs bi-directionally with up to 5-A current. Pair of half-bridges can also be paralleled together to drive a single TEC with up to 10-A current.

The DRV8962-Q1 also features integrated current sensing and current sense output (IPROPI) with ± 3.5 % accuracy to eliminate the need for two external shunt resistors in a closed-loop control topology, saving bill-of-materials cost and space. Figure 7-8 shows the schematic of two TECs connected to a DRV8962-Q1 driver.

DRV8962-Q1 Driving two TECsFigure 7-8 Driving two TECs

Figure 7-9 shows the schematic to drive one TEC with higher current.

DRV8962-Q1 Driving one TEC with higher currentFigure 7-9 Driving one TEC with higher current

The LC filters connected to the output nodes convert the PWM output from the DRV8962-Q1 into a low-ripple DC voltage across the TEC. The filters are required to minimize the ripple current, because fast transients (e.g., square wave power) can shorten the life of the TEC. The maximum ripple current is recommended to be less than 10% of maximum current. The maximum temperature differential across the TEC, which decreases as ripple current increases, is calculated with the following equation:

Equation 19. ΔT = ΔTMAX / (1 + N2)

Where ΔT is actual temperature differential, ΔTMAX is maximum possible temperature differential specified in the TEC datasheet, N is the ratio between ripple and maximum current. N should not be greater than 0.1.

The choice of the input PWM frequency is a trade-off between switching loss and use of smaller inductors and capacitors. High PWM frequency also means that the voltage across the TEC can be tightly controlled, and the LC components can potentially be cheaper.

The transfer function of a second order low-pass filter is shown in :

Equation 19. H (jω) = 1 / (1 - (ω / ω0)2 + jω / Qω0)

Where,

ω0 = 1 / √(LC), resonant frequency of the filter

Q = quality factor

ω = DRV8962-Q1 input PWM frequency

The resonant frequency for the filter is typically chosen to be at least one order of magnitude lower than the PWM frequency. With this assumption, Equation 19 may be simplified to -

H in dB = -40 log (fS/f0)

Where f0 = 1/ 2π√(LC) and fS is the input PWM switching frequency.

  • If L = 10 μH and C = 22 μF, the resonant frequency is 10.7 kHz.

  • This resonant frequency corresponds to 39 dB of attenuation at 100 kHz switching frequency.

  • For VM = 48 V, 39 dB attenuation means that the amount of ripple voltage across the TEC element will be approximately 550 mV.

  • For a TEC element with a resistance of 1.5 Ω, the ripple current through the TEC will therefore be 366 mA.

  • At the 5-A maximum output current of the DRV8962-Q1, 366 mA corresponds to 7.32% ripple current.

  • This will cause about 0.5% reduction of the maximum temperature differential of the TEC element, as per Equation 19.

Adjust the LC values according to the supply voltage and DC current through the TEC element. The DRV8962-Q1 supports up to 200 kHz input PWM frequency. The power loss in the device at any given ambient temperature must be carefully considered before selecting the input PWM frequency.

Closing the loop on current is important in some TEC based heating and cooling systems. The DRV8962-Q1 can achieve this without the need for external current shunt resistors. Internal current mirrors are used to monitor the currents in each half-bridge and this information is available on IPROPI pins. A microcontroller can monitor and adjust the PWM duty based on the IPROPI pin voltage. When driving two TECs, connect the IPROPI pins of the corresponding half-bridges together to measure the H-bridge current. For example, for the schematic shown in Figure 7-8, IPROPI1 and IPROPI2 are tied together, and IPROPI3 and IPROPI4 are also together. When driving only one TEC as shown in Figure 7-9, tie all the IPROPI pins together.

Additionally, the DRV8962-Q1 can regulate the current internally by providing an external voltage reference (VREF) to the device to adjust the current regulation trip point. The current loop would then be closed within the H-bridge itself.