SLVSHN2 July   2024 DRV8962-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6Detailed Description
    1. 6.1  Overview
    2. 6.2  Functional Block Diagram
    3. 6.3  Feature Description
    4. 6.4  Independent Half-bridge Operation
    5. 6.5  Current Sensing and Regulation
      1. 6.5.1 Current Sensing and Feedback
      2. 6.5.2 Current Sensing with External Resistor
      3. 6.5.3 Current Regulation
    6. 6.6  Charge Pump
    7. 6.7  Linear Voltage Regulator
    8. 6.8  VCC Voltage Supply
    9. 6.9  Logic Level Pin Diagram
    10. 6.10 Protection Circuits
      1. 6.10.1 VM Undervoltage Lockout (UVLO)
      2. 6.10.2 VCP Undervoltage Lockout (CPUV)
      3. 6.10.3 Logic Supply Power on Reset (POR)
      4. 6.10.4 Overcurrent Protection (OCP)
      5. 6.10.5 Thermal Shutdown (OTSD)
      6. 6.10.6 nFAULT Output
      7. 6.10.7 Fault Condition Summary
    11. 6.11 Device Functional Modes
      1. 6.11.1 Sleep Mode
      2. 6.11.2 Operating Mode
      3. 6.11.3 nSLEEP Reset Pulse
      4. 6.11.4 Functional Modes Summary
  8. 7Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Driving Solenoid Loads
        1. 7.1.1.1 Solenoid Driver Typical Application
        2. 7.1.1.2 Thermal Calculations
          1. 7.1.1.2.1 Power Loss Calculations
          2. 7.1.1.2.2 Junction Temperature Estimation
        3. 7.1.1.3 Application Performance Plots
      2. 7.1.2 Driving Stepper Motors
        1. 7.1.2.1 Stepper Driver Typical Application
        2. 7.1.2.2 Power Loss Calculations
        3. 7.1.2.3 Junction Temperature Estimation
      3. 7.1.3 Driving Brushed-DC Motors
        1. 7.1.3.1 Brushed-DC Driver Typical Application
        2. 7.1.3.2 Power Loss Calculation
        3. 7.1.3.3 Junction Temperature Estimation
        4. 7.1.3.4 Driving Single Brushed-DC Motor
      4. 7.1.4 Driving Thermoelectric Coolers (TEC)
      5. 7.1.5 Driving Brushless DC Motors
    2. 7.2 Package Thermal Considerations
      1. 7.2.1 Thermal Performance
        1. 7.2.1.1 Steady-State Thermal Performance
        2. 7.2.1.2 Transient Thermal Performance
      2. 7.2.2 PCB Material Recommendation
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Bulk Capacitance
      2. 7.3.2 Power Supplies
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8Device and Documentation Support
    1. 8.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9Mechanical, Packaging, and Orderable Information
    1. 9.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
7.1.1.2.2 Junction Temperature Estimation

The estimated junction temperature will be: TJ = TA + (PTOT x θJA)

The junction-to-ambient thermal resistance θJA is 22.2 °C/W for a JEDEC standard PCB.

Therfore, the first estimate of the junction temperature is -

TJ = TA + (PTOT x θJA) = 25 + (2.552 x 22.2) = 81.7 °C

For more accurate calculation, consider the dependency of on-resistance of FETs with device junction temperature shown in the Typical Operating Characteristics section.

For example,

  • At 81.7 °C junction temperature, the on-resistance will likely increase by a factor of 1.3 compared to the on-resistance at 25 °C.

  • The initial estimate of conduction loss (loss due to RDS(ON)) for each half-bridge was 0.477 W.

  • New estimate of conduction loss will therefore be 0.477 W x 1.3 = 0.62 W.

  • New estimate of the total power loss will accordingly be 3.124 W.

  • New estimate of junction temperature will be 94.4 °C.

  • Further iterations are unlikely to increase the junction temperature estimate by significant amount.