SNLS645A
August 2019 – December 2019
DS160PR410
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Typical Application
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
DC Electrical Characteristics
6.6
High Speed Electrical Characteristics
6.7
SMBUS/I2C Timing Charateristics
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Linear Equalization
7.3.2
DC Gain
7.3.3
Receiver Detect State Machine
7.4
Device Functional Modes
7.4.1
Active PCIe Mode
7.4.2
Active Buffer Mode
7.4.3
Standby Mode
7.5
Programming
7.5.1
Control and Configuration Interface
7.5.1.1
Pin Mode
7.5.1.1.1
Four-Level Control Inputs
7.5.1.2
SMBUS/I2C Register Control Interface
7.5.1.3
SMBus/I2C Master Mode Configuration (EEPROM Self Load)
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
PCIe x4 Lane Configuration
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Curves
8.2.2
DisplayPort Application
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RNQ|40
MPQF457A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snls645a_oa
snls645a_pm
6
Specifications