SNLS680 December 2020 DS160UP822
PRODUCTION DATA
If MODE = L2 (SMBus / I2C slave control mode), the DS160UP822 is configured for best signal integrity through a standard I2C or SMBus interface that may operate up to 400 kHz. The slave address of the device is determined by the pin strap settings on the ADDR1 and ADDR0 pins. Note slave addresses to access channel 0-3 and Channels 4-7 is different. Channel bank 4-7 has address which is Channel bank 0-3 address +1. The sixteen possible slave addresses (8-bit) for each channel banks of the the device are shown in Table 7-3. In SMBus/I2C modes the SCL, SDA pins must be pulled up to a 3.3 V supply with a pull-up resistor. The value of the resistor depends on total bus capacitance. 4.7 kΩ is a good first approximation for a bus capacitance of 50 pF.
Refer to the DS160UP822 Programming Guide (SNLU279) for register map details.ADDR1 | ADDR0 | 7-bit Slave Address Channels 0-3 | 7-bit Slave Address Channels 4-7 |
---|---|---|---|
L0 | L0 | 0x18 | 0x19 |
L0 | L1 | 0x1A | 0x1B |
L0 | L2 | 0x1C | 0x1D |
L0 | L3 | 0x1E | 0x1F |
L1 | L0 | 0x20 | 0x21 |
L1 | L1 | 0x22 | 0x23 |
L1 | L2 | 0x24 | 0x25 |
L1 | L3 | 0x26 | 0x27 |
L2 | L0 | 0x28 | 0x29 |
L2 | L1 | 0x2A | 0x2B |
L2 | L2 | 0x2C | 0x2D |
L2 | L3 | 0x2E | 0x2F |
L3 | L0 | 0x30 | 0x31 |
L3 | L1 | 0x32 | 0x33 |
L3 | L2 | 0x34 | 0x35 |
L3 | L3 | 0x36 | 0x37 |