SNLS144K June   2005  – March 2024 DS40MB200

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Ratings
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 CML Inputs and EQ
      2. 7.3.2 Multiplexer and Loopback Control
      3. 7.3.3 CML Drivers and Pre-Emphasis Control
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.1 Design Requirements

In a typical design, the DS40MB200 equalizes a short backplane trace on its input, followed by a longer trace at the DS40MB200 output. In this application example, a 25-inch FR4 coupled micro-strip board trace is used in place of the short backplane link. A block diagram of this example is shown in Figure 8-3.

DS40MB200 Block Diagram of DS40MB200 Application ExampleFigure 8-3 Block Diagram of DS40MB200 Application Example

The 25-inch microstrip board trace has approximately 6 dB of attenuation between 375 MHz and 1.875 GHz, representing closely the transmission loss of the short backplane transmission line. The 25-inch microstrip is connected between the pattern generator and the differential inputs of the DS40MB200 for AC measurements.

Table 8-1 Input Trace Parameters
TRACE LENGTHFINISHED TRACE WIDTH WSEPARATION BETWEEN TRACESDIELECTRIC HEIGHT HDIELECTRIC CONSTANT εRLOSS TANGENT
25 inches8.5 mil11.5 mil6 mil3.80.022

The length of the output trace may vary based on system requirements. In this example, a 40-inch FR4 trace with similar trace width, separation, and dielectric characteristics is placed at the DS40MB200 output.

As with any high-speed design, there are many factors which influence the overall performance. Following is a list of critical areas for consideration and study during design.

  • Use 100-Ω impedance traces. Generally, these are very loosely coupled to ease routing length differences.
  • Place AC-coupling capacitors near to the receiver end of each channel segment to minimize reflections.
  • The maximum body size for AC-coupling capacitors is 0402.
  • Back-drill connector vias and signal vias to minimize stub length.
  • Use reference plane vias to ensure a low inductance path for the return current.