SNLS401C February   2012  – September 2018 DS90C187

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application
      2.      Typical Application
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
    1.     DS90C187 Pin Descriptions — Serializer
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Recommended Input Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 AC Timing Diagrams
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Device Functional Modes
      1. 8.3.1  Device Configuration
      2. 8.3.2  Single Pixel Input / Single Pixel Output
      3. 8.3.3  Single Pixel Input / Dual Pixel Output
      4. 8.3.4  Dual Pixel Input / Dual Pixel Output
      5. 8.3.5  Pixel Clock Edge Select (RFB)
      6. 8.3.6  Power Management
      7. 8.3.7  Sleep Mode (PDB)
      8. 8.3.8  LVDS Outputs
      9. 8.3.9  18 bit / 24 bit Color Mode (18B)
      10. 8.3.10 LVCMOS Inputs
    4. 8.4 Programming
      1. 8.4.1 LVDS Interface / TFT Color Data Recommended Mapping
        1. 8.4.1.1 Color Mapping Information
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 LVDS Interconnect Guidelines
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Up Sequence
    2. 10.2 Power Supply Filtering
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.8 LVDS Outputs

The DS90C187's LVDS drivers are compatible with ANSI/TIA/EIA-644-A LVDS receivers. The LVDS drivers can output a power saving low VOD, or a high VOD to enable longer trace and cable lengths by configuring the VODSEL pin.

Table 4. VOD Select

VODSEL Result
0 ±220 mV (440 mVpp)
1 ±340 mV (680 mVpp)

Any unused LVDS outputs that are not powered down or put into TRI-STATE® due to the MODE0, MODE1, or 18B pins should be externally terminated differentially with a 100 ohm resistor. For example, when driving a timing controller (TCON) that only requires an 8D + C LVDS interface, rather than 8D + 2C, the unused clock line should be terminated near the package of the DS90C187. For more information regarding the output state of unused LVDS drivers, refer to the next section, 18 bit / 24 bit Color Mode (18B). For more information regarding the electrical characteristics of the LVDS outputs, refer to the LVDS DC Characteristics and LVDS Switching Specifications.