SNLS011D
July 1999 – August 2016
DS90LV032A
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Dissipation Ratings
6.8
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Fail-Safe Feature
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.1.1
Probing LVDS Transmission Lines
9.1.2
Cables and Connectors, General Comments
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Probing LVDS Transmission Lines
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
Power Decoupling Recommendations
11.1.2
Differential Traces
11.1.3
Termination
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Community Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PW|16
MPDS361A
D|16
MPDS178G
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snls011d_oa
snls011d_pm
7 Parameter Measurement Information
Figure 4. Receiver Propagation Delay and Transition Time Test Circuit
Figure 5. Receiver Propagation Delay and Transition Time Waveforms
C
L
includes load and test jig capacitance.
S
1
= V
CC
for t
PZL
, and t
PLZ
measurements.
S
1
= GND for t
PZH
and t
PHZ
measurements.
Figure 6. Receiver TRI-STATE Delay Test Circuit
Figure 7. Receiver TRI-STATE Delay Waveforms