The analog subsystem has the following features:
- Flexible voltage references:
- The ADCs are referenced to VREFHIx and VREFLOx pins.
- VREFHIAB and
VREFHICDE pin voltages can be driven in externally or can be
generated by an internal bandgap voltage reference.
- The internal
voltage reference range can be selected to be 0 V to 2.5 V for
ADC A and ADC B when operated in 16-bit mode, however the
internal voltage reference range can be selected to be 0 V to
3.3 V or 0 V to 2.5 V for ADC A and ADC B when operated in
12-bit mode.
- The internal
voltage reference range can be selected to be 0 V to 3.3 V or
0 V to 2.5 V for ADC C, ADC D and ADC E.
- The buffered DACs are referenced to VREFHIx and VSSA
- Alternately, these DACs can be referenced to the VDAC pin and
VSSA
- The comparator DACs are referenced to VDDA and VSSA
- Alternately, these DACs can be referenced to the VDAC pin and
VSSA
- Flexible pin usage
- Buffered DAC outputs, comparator subsystem inputs, and digital inputs
(AIOs)/outputs (AGPIOs) are multiplexed with ADC inputs
- Internal connection to VREFLO for offset
self-calibration