The FPC402 quad port controller serves as a low-speed signal aggregator for common port types such as SFP, QSFP, Mini-SAS HD, and others. The FPC402 aggregates all low-speed control and I2C signals across four ports and presents a single easy-to-use management interface to the host (I2C or SPI). Multiple FPC402s can be used in high-port-count applications with one common control interface to the host. The FPC402 is designed to allow placement on the bottom side of the PCB, underneath the press fit connector, to simplify routing. This localized control of the low-speed signals in the ports cuts system BOM costs by enabling the use of smaller IO count control devices (FPGAs, CPLDs, and MCUs) and by reducing routing layer congestion.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
FPC402 | WQFN (56) | 5.00 mm × 11.00 mm |
PART NUMBER | ACCESSIBLE DOWNSTREAM ADDRESSES | PIN COMPATIBLE |
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FPC402 | All valid I2C addreses | Yes |
FPC401 | MSA Addresses: 0xA0, 0xA2 | Yes |
Changes from Revision B (August 2018) to Revision C (September 2020)
Changes from Revision A (October 2017) to Revision B (August 2018)
The FPC402 is compatible with standard SFF-8431, SFF-8436, and SFF-8449 low-speed management interfaces, including a dedicated 100- or 400-kHz I2C interface to each port. Additional general-purpose pins are available to perform functions such as driving port status LEDs or controlling power switches. The LED drivers have convenience features such as programmable blinking and dimming. The interface to the host controller can operate on a separate supply voltage between 1.8 V and 3.3 V to support low-voltage I/Os.
The FPC402 can prefetch data from user-specified registers in each module, making the data readily accessible to the host through a fast I2C (up to 1 MHz) or SPI (up to 10 MHz) interface. In addition, the FPC402 can trigger an interrupt to the host whenever critical, user-configurable events occur associated with any of the ports the device controls. This eliminates the need to continuously poll the modules.