SLLSFO3A
December 2021 – February 2023
ISO6760L
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Power Ratings
6.6
Insulation Specifications
6.7
Safety-Related Certifications
6.8
Safety Limiting Values
6.9
Electrical Characteristics—5-V Supply
6.10
Supply Current Characteristics—5-V Supply
6.11
Electrical Characteristics—3.3-V Supply
6.12
Supply Current Characteristics—3.3-V Supply
6.13
Electrical Characteristics—2.5-V Supply
6.14
Supply Current Characteristics—2.5-V Supply
6.15
Electrical Characteristics—1.8-V Supply
6.16
Supply Current Characteristics—1.8-V Supply
6.17
Switching Characteristics—5-V Supply
6.18
Switching Characteristics—3.3-V Supply
6.19
Switching Characteristics—2.5-V Supply
6.20
Switching Characteristics—1.8-V Supply
6.21
Insulation Characteristics Curves
6.22
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Electromagnetic Compatibility (EMC) Considerations
8.3.2
Interlock Capability
8.4
Device Functional Modes
8.4.1
Device I/O Schematics
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
10
Insulation Lifetime
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.1.1
PCB Material
12.2
Layout Example
13
Device and Documentation Support
13.1
Documentation Support
13.1.1
Related Documentation
13.2
Receiving Notification of Documentation Updates
13.3
Support Resources
13.4
Trademarks
13.5
Electrostatic Discharge Caution
13.6
Glossary
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DW|16
MSOI003I
Thermal pad, mechanical data (Package|Pins)
DW|16
QFND505A
Orderable Information
sllsfo3a_oa
8.4.1
Device I/O Schematics
Figure 8-4
Device I/O Schematics