SLLSFO3A December 2021 – February 2023 ISO6760L
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
ISO6760L | |||||||
tPLH, tPHL | Propagation delay time | One input in static state and other input is toggled at 100kbps. See Switching Characteristics Test Circuit and Voltage Waveforms | 14.5 | 23.5 | ns | ||
PWD | Pulse width distortion(1) |tPHL – tPLH| | 1 | 7.1 | ns | |||
tsk(o) | Channel-to-channel output skew time(2) | Same-direction channels | 6 | ns | |||
tsk(pp) | Part-to-part skew time(3) | 7.9 | ns | ||||
tr | Output signal rise time | See Switching Characteristics Test Circuit and Voltage Waveforms |
2 | 4 | ns | ||
tf | Output signal fall time | 2 | 4 | ns | |||
tPU | Time from UVLO to valid output data | Time from UVLO to valid output data | 300 | us | |||
tDO | Default output delay time from input power loss | Measured from the time VCC goes below 1.2V. See Default Output Delay Time Test Circuit and Voltage Waveforms | 0.1 | 0.3 | us | ||
tie | Time interval error | 216 – 1 PRBS data at 50 Mbps | 1 | ns |