SLLS965E July   2009  – November 2024 ISO7220A-Q1 , ISO7221A-Q1 , ISO7221C-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Recommended Operating Conditions
    3. 5.3  Safety-Related Certifications
    4. 5.4  Thermal Information
    5. 5.5  Safety Limiting Values
    6. 5.6  Insulation Specifications
    7. 5.7  Electrical Characterstics
    8. 5.8  Electrical Characteristics
    9. 5.9  Electrical Characteristics
    10. 5.10 Electrical Charcteristics
    11. 5.11 Switching Characteristics
    12. 5.12 Switching Characteristics
    13. 5.13 Switching Characteristics
    14. 5.14 Switching Characteristics
    15. 5.15 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Insulation Lifetime
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 PCB Material
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.11 Switching Characteristics

VCC1 = 3.3 V ± 10%, VCC2 = 5 V ± 10%, over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tpLH, tpHL Propagation delay ISO722xA-Q1 See Figure 6-1 268 395 605 ns
PWD Pulse-width distortion |tpHL – tpLH|(1) 1 22 ns
tpLH, tpHL Propagation delay ISO722xC-Q1 See Figure 6-1 21 36 48 ns
PWD Pulse-width distortion |tpHL – tpLH|(1) 1 3 ns
tsk(pp) Part-to-part skew (2) ISO722xA-Q1 190 ns
ISO722xC-Q1 10
tsk(o) Channel-to-channel output skew (3) ISO7220A-Q1 3 15 ns
tr Output signal rise time See Figure 6-1 2.3 ns
tf Output signal fall time See Figure 6-1 2.3 ns
tfs Failsafe output delay time from input power loss See Figure 6-2 3 μs
(1) Also referred to as pulse skew.
(2) tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.
(3) tsk(o) is the skew between specified outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical specified loads.