SLLSEM2H November 2014 – November 2024 ISO7821
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
VOH | High-level output voltage | IOH = –2 mA; see Figure 6-1 | VCCO(1) – 0.4 | VCCO – 0.2 | V | ||
VOL | Low-level output voltage | IOL = 2 mA; see Figure 6-1 | 0.2 | 0.4 | V | ||
VI(HYS) | Input threshold voltage hysteresis | 0.1 x VCCO | V | ||||
IIH | High-level input current | VIH = VCCI(1) at INx or ENx | 10 | μA | |||
IIL | Low-level input current | VIL = 0 V at INx or ENx | -10 | ||||
CMTI | Common-mode transient immunity | VI = VCCI or 0 V; see Figure 6-4 | 100 | kV/μs | |||
Supply Current - ISO7821DW and ISO7821FDW | |||||||
ICC1, ICC2 | DC Signal | VI = 0 V (ISO7821F) , VI = VCCI(1)(ISO7821) | 1.2 | 1.7 | mA | ||
ICC1, ICC2 | DC Signal | VI = VCCI(1) (ISO7821F) , VI = 0 V (ISO7821) | 2.4 | 3.4 | mA | ||
ICC1, ICC2 | 1 Mbps | All channels switching with square wave clock input; CL = 15 pF | 1.8 | 2.6 | mA | ||
ICC1, ICC2 | 10 Mbps | 2.2 | 3 | mA | |||
ICC1, ICC2 | 100 Mbps | 5.8 | 7.1 | mA | |||
Supply Current - ISO7821DWW and ISO7821FDWW | |||||||
ICC1, ICC2 | Disable | EN1 = EN2 = 0V, VI = 0 V (ISO7821F) , VI = VCCI(1)(ISO7821) | 0.7 | 1.1 | mA | ||
ICC1, ICC2 | Disable | EN1 = EN2 = 0V, VI = VCCI(1) (ISO7821F) , VI = 0 V (ISO7821) | 1.8 | 2.9 | mA | ||
ICC1, ICC2 | DC Signal | VI = 0 V (ISO7821F) , VI = VCCI(1)(ISO7821) | 1.2 | 1.7 | mA | ||
ICC1, ICC2 | DC Signal | VI = VCCI(1) (ISO7821F) , VI = 0 V (ISO7821) | 2.4 | 3.5 | mA | ||
ICC1, ICC2 | 1 Mbps | All channels switching with square wave clock input; CL = 15 pF | 1.9 | 2.6 | mA | ||
ICC1, ICC2 | 10 Mbps | 2.3 | 3 | mA | |||
ICC1, ICC2 | 100 Mbps | 5.9 | 7.1 | mA |