The layout example in this section shows
the recommended placement for de-coupling capacitors and ESD protection diodes. A
continuous ground plane is recommended below the D+/D- signal traces. Small
footprint capacitors (0402/0201) are recommended so that these may be placed very
close to the supply pins and corresponding ground pins and connected using the top
layer. There should not be any vias in the routing path between the decoupling
capacitors and the corresponding supply and ground pins. The ESD
protection diodes should be placed close to the connector with a strong connection
to the ground plane. The example shown is for an isolated host or hub, but
similar considerations apply for isolated peripherals also. The 120-μF capacitor on
VBUS only applies to host or hub and should not be used for peripherals. A ferrite
bead, with dc resistance less than 100 mΩ, may be optionally placed on the VBUS
route, after the 100-nF (and 120-μF) capacitors to prevent transients such as ESD
from affecting the rest of the circuits.
For best performance, it is
recommended to minimize the length of D+/D- board traces from the MCU to ISOUSB111, and from ISOUSB111 to the connector. Vias and stubs on
D+/D- lines must be avoided.