SLLSFK3 november   2022 ISOW7741-Q1 , ISOW7742-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Description (continued)
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics - Power Converter
    10. 7.10 Supply Current Characteristics - Power Converter
    11. 7.11 Electrical Characteristics Channel Isolator - VIO, VISOIN = 5-V
    12. 7.12 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 5-V
    13. 7.13 Electrical Characteristics Channel Isolator - VIO, VISOIN = 3.3-V
    14. 7.14 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 3.3-V
    15. 7.15 Electrical Characteristics Channel Isolator - VIO, VISOIN = 2.5-V
    16. 7.16 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 2.5-V
    17. 7.17 Electrical Characteristics Channel Isolator - VIO, VISOIN = 1.8-V
    18. 7.18 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 1.8-V
    19. 7.19 Switching Characteristics - 5-V Supply
    20. 7.20 Switching Characteristics - 3.3-V Supply
    21. 7.21 Switching Characteristics - 2.5-V Supply
    22. 7.22 Switching Characteristics - 1.8-V Supply
    23. 7.23 Insulation Characteristics Curves
    24. 7.24 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
      1. 9.1.1 Power Isolation
      2. 9.1.2 Signal Isolation
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 9.3.2 Power-Up and Power-Down Behavior
      3. 9.3.3 Protection Features
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device I/O Schematics
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
      4. 10.2.4 Insulation Lifetime
  12. 11Power Supply Recommendations
  13. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 PCB Material
    2. 12.2 Layout Example
  14. 13Device and Documentation Support
    1. 13.1 Device Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  15. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-20211018-SS0I-B06L-XNGW-44WXBHCQXHQ6-low.svg Figure 6-1 ISOW7741-Q1 DFM Package 20-Pin SOIC-WB Top View
GUID-20211214-SS0I-CRZX-MV1Q-CF7RR8CVJNKK-low.svg Figure 6-2 ISOW7742-Q1 DFM Package 20-Pin SOIC-WB Top View
PIN I/O DESCRIPTION
NAME NO.
ISOW7741-Q1 ISOW7742-Q1
GNDIO 6 6 — Ground connection for VIO. GND1 and GNDIO needs to be shorted on board.
GND1 10 10 — Ground connection for VDD. GND1 and GNDIO needs to be shorted on board.
GND2 11 11 — Ground connection for VISOOUT. GND2 and GISOIN pins can be shorted on board or connected through a ferrite bead. See the Layout Section for more information.
GISOIN 15 15 — Ground connection for VISOIN. GND2 and GISOIN pins can be shorted on board or connected through a ferrite bead. See the Layout Section for more information.
INA 2 2 I Input channel A
INB

3

3

 I Input channel B
INC

4

17

 I Input channel C
IND

16

16

 I Input channel D
OUTA 19 19 O Output channel A
OUTB 18

18

 O Output channel B
OUTC

17

4

 O Output channel C
OUTD 5 5 O Output channel D
EN_IO1

7

7

I

 Output Enable 1: When EN_IO1 is high or open then the channel output pins on side 1 are enabled. When EN_IO1 is low then the channel output pins on side 1 are in a high impedance state and the transmitter of the channel input pins on side 1 are disabled.
EN_IO2 14 14

I

 Output Enable 2: When EN_IO2 is high or open then the channel output pins on side 2 are enabled. When EN_IO2 is low then the channel output pins on side 2 are in a high impedance state and the transmitter of the channel input pins on side 2 are disabled.
EN/FLT

8

8

I/O

 Multi-function power converter enable input pin or fault output pin. Can only be used as either an input pin or an output pin.

Power converter enable input pin: enables and disables the integrated DC-DC power converter. Connect directly to microcontroller or through a series current limiting resistor to use as an enable input pin. DC-DC power converted is enabled when EN/FLT is high to the VIO voltage level and disabled when low at GND1 voltage level.

Fault output pin: Alert signal if power converter is not operating properly. This pin is active low. Connect to microcontroller through a 5 kΩ or greater pull-up resistor in order to use as a fault outpin pin.

See Section 9.3.3 for more information

VSEL

13

13

I

 VISOOUT selection pin. VISOOUT = 5 V when VSEL shorted to VISOOUT. VISOOUT = 3.3 V, when VSEL shorted to GND2. For more information see the Device Functional Modes.
VIO 1 1 — Side 1 logic supply.
VDD

9

9

 — Side 1 DC-DC converter power supply.
VISOIN 20 20 — Side 2 supply voltage for isolation channels. VISOIN and VISOOUT pins can be shorted on board or connected through a ferrite bead. See Application and Implementation for more information.
VISOOUT

12

12

—

 Isolated power converter output voltage. VISOIN and VISOOUT pins can be shorted on board or connected through a ferrite bead. See Application and Implementation for more information.