SLLSFK3 november   2022 ISOW7741-Q1 , ISOW7742-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Description (continued)
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics - Power Converter
    10. 7.10 Supply Current Characteristics - Power Converter
    11. 7.11 Electrical Characteristics Channel Isolator - VIO, VISOIN = 5-V
    12. 7.12 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 5-V
    13. 7.13 Electrical Characteristics Channel Isolator - VIO, VISOIN = 3.3-V
    14. 7.14 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 3.3-V
    15. 7.15 Electrical Characteristics Channel Isolator - VIO, VISOIN = 2.5-V
    16. 7.16 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 2.5-V
    17. 7.17 Electrical Characteristics Channel Isolator - VIO, VISOIN = 1.8-V
    18. 7.18 Supply Current Characteristics Channel Isolator - VIO, VISOIN = 1.8-V
    19. 7.19 Switching Characteristics - 5-V Supply
    20. 7.20 Switching Characteristics - 3.3-V Supply
    21. 7.21 Switching Characteristics - 2.5-V Supply
    22. 7.22 Switching Characteristics - 1.8-V Supply
    23. 7.23 Insulation Characteristics Curves
    24. 7.24 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
      1. 9.1.1 Power Isolation
      2. 9.1.2 Signal Isolation
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 9.3.2 Power-Up and Power-Down Behavior
      3. 9.3.3 Protection Features
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device I/O Schematics
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
      4. 10.2.4 Insulation Lifetime
  12. 11Power Supply Recommendations
  13. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 PCB Material
    2. 12.2 Layout Example
  14. 13Device and Documentation Support
    1. 13.1 Device Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  15. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2.1 Design Requirements

To design with this device, use the parameters listed in Table 10-1.

Table 10-1 Design Parameters
PARAMETER VALUE
VDD input voltage 3 V to 5.5 V
VIO input voltage 1.71 V to 5.5 V
VISOIN input voltage 1.71 V to 5.5 V
VDD decoupling capacitors 10 µF + 1 µF + 0.01 µF + optional additional capacitance
VIO decoupling capacitors 0.1 µF + optional additional capacitance
VISOIN decoupling capacitors 0.1 µF + optional additional capacitance
VISOOUT decoupling capacitors 10 µF + 1 µF + 0.01 µF + optional additional capacitance
VISOOUT to VISOIN series inductor BLM15ELX9331SN1D
GND2 to GISOIN series inductor BLM15ELX9331SN1D
VIO series inductor BLM15ELX9331SN1D
VDD series inductor BLM15ELX9331SN1D
GND1 to GNDIO series inductor BLM15ELX9331SN1D

Because of very-high current flowing through the ISOW7741-Q1 device device VDD and VISOOUT supplies, higher decoupling capacitors typically provide better noise and ripple performance. Although a 10-µF capacitor is adequate, higher decoupling capacitors (such as 47 µF) on both the VDD and VISOOUT pins to the respective grounds are strongly recommended to achieve the best performance.