SLLSEY2G March   2017  – August 2021 ISOW7840 , ISOW7841 , ISOW7842 , ISOW7843 , ISOW7844

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics—5-V Input, 5-V Output
    10. 7.10 Supply Current Characteristics—5-V Input, 5-V Output
    11. 7.11 Electrical Characteristics—3.3-V Input, 5-V Output
    12. 7.12 Supply Current Characteristics—3.3-V Input, 5-V Output
    13. 7.13 Electrical Characteristics—5-V Input, 3.3-V Output
    14. 7.14 Supply Current Characteristics—5-V Input, 3.3-V Output
    15. 7.15 Electrical Characteristics—3.3-V Input, 3.3-V Output
    16. 7.16 Supply Current Characteristics—3.3-V Input, 3.3-V Output
    17. 7.17 Switching Characteristics—5-V Input, 5-V Output
    18. 7.18 Switching Characteristics—3.3-V Input, 5-V Output
    19. 7.19 Switching Characteristics—5-V Input, 3.3-V Output
    20. 7.20 Switching Characteristics—3.3-V Input, 3.3-V Output
    21. 7.21 Insulation Characteristics Curves
    22. 7.22 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 9.3.2 Power-Up and Power-Down Behavior
      3. 9.3.3 Current Limit, Thermal Overload Protection
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device I/O Schematics
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
        1. 10.2.3.1 Insulation Lifetime
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 PCB Material
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Related Links
    4. 13.4 Receiving Notification of Documentation Updates
    5. 13.5 Support Resources
    6. 13.6 Trademarks
    7. 13.7 Electrostatic Discharge Caution
    8. 13.8 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from Revision F (March 2019) to Revision G (August 2021)

  • Added 3.3 V to 5 V power converter support throughoutGo
  • Removed references to 100 uF capacitor throughoutGo
  • Removed paragraph discussing secondary VISO monitoringGo

Changes from Revision E (November 2017) to Revision F (March 2019)

  • Made editorial and cosmetic changes throughout the documentGo
  • Added "Robust Isolation Barrier" bullet in Section 1 Go
  • Added ">100-Year Projected Lifetime at 1 kVRMS Working Voltage" bullet in Section 1 Go
  • Added "Up to 5000 VRMS Isolation Rating" bullet in Section 1 Go
  • Added "Up to 10 kVPK Surge Capability" bullet in Section 1 Go
  • Added "±8 kV IEC 61000-4-2 Contact Discharge Protection across Isolation Barrier" bullet in Section 1 Go
  • Updated Figure 3-1 to show two isolation capacitors in series instead of a single capacitor for signal isolation channels Go
  • Added "Contact discharge per IEC 61000-4-2; Isolation barrier withstand test" specification of ±8000 in Section 7.2 tableGo
  • Added table note "IEC ESD strike is applied across the barrier with all pins on each side tied together creating a two-terminal device" to Section 7.2 tableGo
  • Deleted "TJ or Junction temperature" parameter from Section 7.3 table as it is already specified in Section 7.1 tableGo
  • Added "see Figure 10-5" to TEST CONDITIONS of VIOWM specificationGo
  • Added the following note to Figure 8-2: "Optional 100 µF capacitor can be added between VCC and GND1; refer to Section 11" Go
  • Added the following note to Isolated Power and SPI for ADC Sensing Application with ISOW7841-Q1: "Optional 100 µF capacitor can be added between VCC and GND1; refer to Power Supply Recommendations" Go
  • Added the following text to Section 10.2.1: "Optional 100 µF decoupling capacitor can be added between VCC and GND1 pins; refer to Section 11 for more detailsGo
  • Added the following note to Figure 10-2: "Optional 100 µF capacitor can be added between VCC and GND1; refer to Section 11" Go
  • Added Section 10.2.3.1 sub-section under Section 10.2.3 sectionGo
  • Added text to Section 11 section to emphasise that input decoupling capacitor should be larger than output capacitor by at least 100 µF Go
  • Added the following note to Figure 12-1: "Optional 100 µF capacitor can be added between VCC and GND1; refer to Section 11" Go

Changes from Revision D (November 2017) to Revision E (November 2017)

  • Changed the ISOW7843 device from Preview to Production Data Go
  • Added the ISOW7843 current parameters to each Supply Current Characteristics table Go
  • Added the supply current versus data rate graphs for the ISOW7843 in the Typical Characteristics sectionGo

Changes from Revision C (October 2017) to Revision D (November 2017)

  • Changed the ISOW7840 device from Preview to Production Data Go
  • Added the ISOW7840 current parameters to each Supply Current Characteristics table Go
  • Changed IISO to ILOAD and the value of wave clock input from 0.5, 5, and 50 MHz to 1, 10, and 100 Mbps in the test conditions for the ISOW7841 current parameters in each Supply Current Characteristics table Go
  • Deleted no external ILOAD test condition for the current available to isolated supply parameter for the ISOW7842 and ISOW7844 devices in each Supply Current Characteristics table Go
  • Changed the labels of the curves in the Thermal Derating Curve for Safety Limiting Current per VDE Go
  • Added the supply current versus data rate graphs for the ISOW7840 in the Typical Characteristics sectionGo
  • Changed the ground symbols for the input schematic for devices with F suffix and the SEL pin in the Device I/O Schematics figureGo

Changes from Revision B (June 2017) to Revision C (October 2017)

  • Changed the Safety-Related Certifications Features listGo
  • Changed header row From: DIN V VDE 0884-10 (VDE V 0884-10): 2016-12 To: DIN V VDE 0884-11:2017-01 in the Insulation Specifications Go
  • Changed VIOSM test conditions in Insulation Specifications Go
  • Changed VISO(UL) test conditions in Insulation Specifications Go
  • Changed the Safety-Related Certifications tableGo
  • Changed Note 1 of the Safety Limiting Values tableGo
  • Added the ISOW7842 current parameters to each Supply Current table Go
  • Added the supply current versus data rate graphs for the ISOW7842 in the Typical Characteristics sectionGo

Changes from Revision A (March 2017) to Revision B (June 2017)

  • Added the ISOW7844 current parameters to each Supply Current table Go

Changes from Revision * (March 2017) to Revision A (March 2017)

  • Changed the maximum propagation delay time and the typical and maximum values for pulse width distortion in all Switching Characteristics tablesGo
  • Changed the maximum limit for output signal rise and fall times from 3 to 4 ns in the Switching Characteristics—5-V Input, 3.3-V Output tableGo