Low input capacitance: 24 pF at VDS = 5 V
High gate-to-drain and gate-to-source breakdown voltage: –40 V
High transconductance: 68 mS
Packages: Small SC70 and SOT-23
The JFE150 is a Burr-Brown™ discrete JFET built using Texas Instruments' modern, high-performance, analog bipolar process. The JFE150 features performance not previously available in older discrete JFET technologies. The JFE150 offers the maximum possible noise-to-power efficiency and flexibility, where the quiescent current can be set by the user and yields excellent noise performance for currents from 50 μA to 20 mA. When biased at 5 mA, the device yields 0.8 nV/√Hz of input-referred noise, giving ultra-low noise performance with extremely high input impedance (> 1 TΩ). The JFE150 also features integrated diodes connected to separate clamp nodes to provide protection without the addition of high-leakage, nonlinear, external diodes.
The JFE150 can withstand a high drain-to-source voltage of 40 V, as well as gate-to-source and gate-to-drain voltages down to –40 V. The temperature range is specified from –40°C to +125°C. The device is offered in 5-pin SOT-23 and SC70 packages.
PART NUMBER | PACKAGE(1) | BODY SIZE (NOM) |
---|---|---|
JFE150 | DBV (SOT-23, 5) | 2.90 mm × 1.60 mm |
DCK (SC70, 5) | 2.00 mm × 1.25 mm |
PARAMETER | VALUE | |
---|---|---|
VGSS | Gate-to-source breakdown voltage | –40 V |
VDSS | Drain-to-source breakdown voltage | ±40 V |
CISS | Input capacitance | 24 pF |
TJ | Junction temperature | –40°C to +125°C |
IDSS | Drain-to-source saturation current | 35 mA |
Changes from Revision A (November 2021) to Revision B (April 2023)
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
D | 5 | Output | Drain |
G | 3 | Input | Gate |
S | 4 | Output | Source |
VCH | 1 | — | Positive diode clamp voltage. Float this pin if clamp diodes are not used. |
VCL | 2 | — | Negative diode clamp voltage. Float this pin if clamp diodes are not used. |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VDS | Drain-to-source voltage | –40 | 40 | V | |
VGS, VGD | Gate-to-source, gate-to-drain voltage | –40 | 0.9 | V | |
VVCH | Voltage between VCH to D, G, or S | 40 | V | ||
VVCL | Voltage between VCL to D, G, or S | –40 | |||
IVCL, IVCH | Clamp diode current | DC | 20 | mA | |
50-ms pulse(2) | 200 | ||||
IDS | Drain-to-source current | –50 | 50 | mA | |
IGS, IGD | Gate-to-source, gate-to-drain current | –20 | 20 | mA | |
TA | Ambient temperature | –55 | 150 | °C | |
TJ | Junction temperature | –55 | 150 | °C | |
Tstg | Storage temperature | –55 | 175 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2500 | V |
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) | ±500 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
IDS | Drain-to-source current | 0.02 | IDSS | mA | |
VGS | Gate-to-source voltage | 0 | –1.2 | V | |
TA | Specified temperature | –40 | 125 | °C |
THERMAL METRIC(1) | JFE150 | UNIT | ||
---|---|---|---|---|
DCK (SC70) | DBV (SOT-23) | |||
5 PINS | 5 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 197.1 | 183.8 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 93.7 | 83.2 | °C/W |
RθJB | Junction-to-board thermal resistance | 44.8 | 51.7 | °C/W |
ψJT | Junction-to-top characterization parameter | 16.7 | 24.9 | °C/W |
ψJB | Junction-to-board characterization parameter | 44.6 | 51.4 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | N/A | °C/W |