SLPS732B
june 2021 – april 2023
JFE150
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Parameter Measurement Information
7.1
AC Measurement Configurations
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Ultra-Low Noise
8.3.2
Low Gate Current
8.3.3
Input Protection
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.1.1
Input Protection Diodes
9.1.2
Capacitive Transducer Input Stage
9.1.3
Common-Source Amplifier
9.1.4
Composite Amplifiers
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Device Support
10.1.1
Development Support
10.1.1.1
PSpice® for TI
10.1.1.2
TINA-TI™ Simulation Software (Free Download)
10.1.1.3
TI Reference Designs
10.1.1.4
Filter Design Tool
10.2
Documentation Support
10.2.1
Related Documentation
10.3
Receiving Notification of Documentation Updates
10.4
Support Resources
10.5
Trademarks
10.6
Electrostatic Discharge Caution
10.7
Glossary
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DCK|5
MPDS025J
DBV|5
MPDS018T
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slps732b_oa
slps732b_pm
6.2
ESD Ratings
VALUE
UNIT
V
(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±2500
V
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002
(2)
±500
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.