SNVSBF7 November   2019 LDC1001

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Axial Distance Sensing Application
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Condition
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Inductive Sensing
      2. 7.3.2 Measuring RP With LDC1001
      3. 7.3.3 Measuring Inductance With LDC1001
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Modes
      2. 7.4.2 INTB Pin Modes
        1. 7.4.2.1 Comparator Mode
        2. 7.4.2.2 Wake-Up Mode
        3. 7.4.2.3 DRDY Mode
    5. 7.5 Programming
      1. 7.5.1 SPI Description
        1. 7.5.1.1 Extended SPI Transactions
    6. 7.6 Register Maps
      1. 7.6.1 Register Description
        1. 7.6.1.1  Revision ID (Address = 0x00)
        2. 7.6.1.2  RP_MAX (Address = 0x01)
        3. 7.6.1.3  RP_MIN (Address = 0x02)
        4. 7.6.1.4  Watchdog Timer Frequency (Address = 0x03)
        5. 7.6.1.5  LDC Configuration (Address = 0x04)
        6. 7.6.1.6  Clock Configuration (Address = 0x05)
        7. 7.6.1.7  Comparator Threshold High LSB (Address = 0x06)
        8. 7.6.1.8  Comparator Threshold High MSB (Address = 0x07)
        9. 7.6.1.9  Comparator Threshold Low LSB (Address = 0x08)
        10. 7.6.1.10 Comparator Threshold Low MSB (Address = 0x09)
        11. 7.6.1.11 INTB Pin Configuration (Address = 0x0A)
        12. 7.6.1.12 Power Configuration (Address = 0x0B)
        13. 7.6.1.13 Status (Address = 0x20)
        14. 7.6.1.14 Proximity Data LSB (Address = 0x21)
        15. 7.6.1.15 Proximity Data MSB (Address = 0x22)
        16. 7.6.1.16 Frequency Counter LSB (Address = 0x23)
        17. 7.6.1.17 Frequency Counter Mid-Byte (Address = 0x24)
        18. 7.6.1.18 Frequency Counter MSB (Address = 0x25)
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Calculation of RP_MIN and RP_MAX
        1. 8.1.1.1 RP_MAX
        2. 8.1.1.2 RP_MIN
      2. 8.1.2 Output Data Rate
      3. 8.1.3 Choosing Filter Capacitor (CFA and CFB Pins)
    2. 8.2 Typical Application
      1. 8.2.1 Axial Distance Sensing Using a PCB Sensor With LDC1001
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Sensor and Target
          2. 8.2.1.2.2 Calculating Sensor Capacitor
          3. 8.2.1.2.3 Choosing Filter Capacitor
          4. 8.2.1.2.4 Setting RP_MIN and RP_MAX
          5. 8.2.1.2.5 Calculating Minimum Sensor Frequency
        3. 8.2.1.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5.1.1 Extended SPI Transactions

A SPI transaction may be extended to multiple registers by keeping the CSB asserted for more than 16 pulses on SCLK. In this mode, the register addresses increment automatically. CSB must be remain asserted during 8*(1+N) clock cycles of SCLK, where N is the amount of bytes to write or read during the transaction.

During an extended read access, SDO outputs the register contents every 8 clock cycles after the initial 8 clocks of the command field. During an extended write access, the data is written to the registers every 8 clock cycles after the initial 8 clocks of the command field.

Extended transactions can be used to read 16 bits of proximity data and 24 bits of frequency data all in one SPI transaction by initiating a read from register 0x21.

LDC1001 extended_spi_transaction_snosd01.gifFigure 16. Extended SPI Transaction