SNOSD47C december   2018  – july 2023 LDC5072-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Description (cont.)
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Diagnostics
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Supply Voltage
      2. 8.3.2 Excitation Signal
      3. 8.3.3 Signal Processing Block
        1. 8.3.3.1 Demodulation
        2. 8.3.3.2 Fixed Gain Control
        3. 8.3.3.3 Automatic Gain Control
      4. 8.3.4 Output Stage
      5. 8.3.5 Diagnostics
        1. 8.3.5.1 Undervoltage Diagnostics
        2. 8.3.5.2 Initialization Diagnostics
        3. 8.3.5.3 Normal State Diagnostics
        4. 8.3.5.4 Fault State Diagnostics
    4. 8.4 Device Functional Modes
      1. 8.4.1 IDLE State
      2. 8.4.2 DIAGNOSTICS State
      3. 8.4.3 NORMAL State
      4. 8.4.4 FAULT State
      5. 8.4.5 DISABLED State
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 5-V Supply Mode
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 VREG and VCC
          2. 9.2.1.2.2 Output Capacitors
          3. 9.2.1.2.3 AGC Mode
        3. 9.2.1.3 Application Curve
      2. 9.2.2 3.3-V Supply Mode
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 VREG and VCC
          2. 9.2.2.2.2 Output Capacitors
          3. 9.2.2.2.3 Fixed Gain Mode
      3. 9.2.3 Redundancy Mode
      4. 9.2.4 Single-Ended Mode
      5. 9.2.5 External Diagnostics Required for Loss of VCC or GND
  11. 10Power Supply Recommendations
    1. 10.1 Mode 1: VCC = 5 V, VREG = 3.3 V
    2. 10.2 Mode 2: VCC = VREG = 3.3 V
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from Revision B (August 2021) to Revision C (July 2023)

  • Changed data sheet status visibility to public releaseGo

Changes from Revision A (September 2020) to Revision B (August 2021)

  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • The application diagrams in the Description section and Figures 9-1, 9-3, 9-4, and 9-5 were updated. Go
  • Separated output comparator short into positive and negative limits.Go
  • The tPRWR_ON_DT in the “Switching Characteristics” is incorrectly specified. The values “360/400/440” will be changed to “302/336/370”.Go
  • The AGC rate change is imprecisely specified in Automatic Gain Control : “1 code each second” was updated to “one code approximately every 840mS”. Added eight codes every 3.2uS during start-up in the fast AGC region.Go
  • Updated application diagram in #GUID-60FF0E0F-8E11-4618-A125-98A79A441464/TITLE-SNOSD47X3280 and updated Table 9-1 to include connection instructions for the AGC_EN pin.Go
  • The resistor R2 in the example design in AGC Mode was updated to 1.5KΩ. Go
  • Changed Figure 9-3 Go

Changes from December 7, 2018 to September 30, 2020 (from Revision * (December 2018) to Revision A (September 2020))

  • Updated Device Max Ambient Operating Temperature to 160°C. Go
  • Updated Functional Safety Capability text.Go
  • Updated pin description for better clarity replacing inverted and non-inverted with negative and positive respectively. Go
  • Updated TA to 160℃ in Absolute Maximum Ratings Go
  • Updated TJ to 170℃ in Absolute Maximum Ratings Go
  • Added 4000V HBM ESD information to ESD RatingsGo
  • Changed INL to ErrINL and updated definition and values in Signal Path section of Electrical Characteristics Go
  •  Changed maximum value of tPROP_CH over temperature and changed maximum TA to 160°C in Signal Path section of Electrical Characteristics Go
  • Changed maximum value of tPROP_DIFF in Signal Path section of Electrical Characteristics Go
  • Added VOUT_SE in Signal Path section of Electrical Characteristics Go
  •  Changed maximum value of VOUT_DIFF_TC over temperature and changed maximum TA to 160°C in Signal Path section of Electrical Characteristics Go
  • Added GMIS_SIG_PATH parameter in Signal Path section of Electrical Characteristics Go
  • Added Vin_off parameter in Signal Path section of Electrical Characteristics Go
  • Added nSIG_PATH_SE parameter in Signal Path section of Electrical Characteristics Go
  • Added nSIG_PATH_DIFF parameter in Signal Path section of Electrical Characteristics Go
  •  Split VAMP_LC between 25°C and over  temperature and specified values wnen VREG is below regulation voltage in Excitation section of Electrical Characteristics Go
  • Split VDC_LC between 25°C and over  temperature and specified values wnen VREG is below regulation voltage in Excitation section of Electrical Characteristics Go
  • Changed limits and test conditions for ILIM_LC  in Excitation section of Electrical Characteristics Go
  •  Added Internal Pull Up resistor parameter RPU_LCx in Excitation section of Electrical Characteristics Go
  •  Added Internal Pull down resistor parameter RPD_LCx in Excitation section of Electrical Characteristics Go
  • Expanded limits for input differential input signal amplitude VDIFF_REC in Receiver section of Electrical Characteristics Go
  • Added Internal pull-up resistor parameter RPU_INxN in Receiver section of Electrical Characteristics Go
  • Added Internal pull-down resistor parameter RPD_INxP in Receiver section of Electrical Characteristics Go
  •  Split RACG_EN_AUTO parameter into RAGC_EN_MIN and RAGC_EN_MAX in AGC section of Electrical Characteristics Go
  •  Added internal pull-up resistor RPU_AGC_EN parameter in AGC section of Electrical Characteristics Go
  •  Updated definition of AGC_Target, AGC_FH, AGC_SH, AGC_SL and AGC_FL for clarity and split  parameter across temperature and VCC in AGC section of Electrical Characteristics Go
  • Changed VILIM_OUT to IILIM_OUT for clarity in Output Stage section of Electrical Characteristics Go
  •  Removed required conditions for VCC and GND connection to be valid and added min, and max values for RPD_OUT and RPU_OUT parameters in Output Stage section of Electrical Characteristics Go
  • Added IOUT_NOVCC_* and IOUT_NOGND_* parameters in Output Stage section of Electrical Characteristics Go
  • Removed required conditions for VCC and GND connection to be valid and added test conditions for VOUT_FLT_LOW and VOUT_FLT_HIGH parameters in Output Stage section of Electrical Characteristics Go
  • Split VOUT_FLT_HIGH and VOUT_FLT_LOW parameters  across temperature and VCC in Output Stage section of Electrical Characteristics Go
  • Added IOUT_LK_PU parameter in Output Stage section of Electrical Characteristics Go
  • Added internal impedance parameters IPD_INx*_BIST in Diagnostics Go
  • Added pin BIST comparator thresholds VTH_FALL_INx*_BIST in Diagnostics Go
  • Added internal impedance parameter IPU_AGC_EN_BIST  on AGC_EN pin in Diagnostics Go
  • Added value for VREG capacitor loss CLOSS_VREG in Diagnostics Go
  •  Moved VPOR_VREG_xth to Diagnostics Go
  • Added LC Frequency fault detection parameter fFLTH_LC in Diagnostics Go
  • Added internal impedance on LCx pins parameters, IPx_LCx_BIST in Diagnostics Go
  • Added tMIN_PH_IMB in Diagnostics Go
  • Added AGC fault limits, VALAGC_INP_OOR_x in Diagnostics Go
  • Added input out-of-range pin and low-pass filter parameters, VOOR_H_INx_x in Diagnostics Go
  • Added common mode fault parmeters for output pin, VCM_x_OUTx_PIN in Diagnostics Go
  • Added VOUTx_SHRT_CMP_OFF in Diagnostics Go
  • Added internal regulator under voltage parameter, VUV_DVDD in Diagnostics Go
  • Added VTOGGLE_AGC_EN in Diagnostics Go
  • Added thermal shutdown parameters TTSD_x in Diagnostics Go
  • Combined VCC out of range fault degltich times in tVCC_FLT_DT and updated value in Switching Characteristics Go
  • Added VREG over voltage deglitch time tVREG_OV_DT in Switching Characteristics Go
  • Added LC amplitude fault deglitch times in Switching Characteristics Go
  • Updated values for tAGC_EN_x_DT parameters Switching Characteristics Go
  • Added input pin and low pass filter fault deglitch times in Switching Characteristics Go
  • Added and updated outpin fault deglitch times tOUT_x_DT in Switching Characteristics Go
  • Added AGC deglitch times tAGC_x_DT in Switching Characteristics Go
  • Renamed tFLT_SIGNAL to tFLT_RECOV in Switching Characteristics Go
  • Added power on degltich time tPWR_ON_DT in Switching Characteristics Go
  • Added Figure 7-6 for OUTx leakage current.Go
  • Updated text in Signal Processing Block for clarityGo
  • Updated Fixed Gain Control section based on new design.Go
  • Updated variable name in Equation 8 for clarity.Go
  • Updated text in Automatic Gain Control to add information on time-step of the AGC block.Go
  • Added details on output pin diagnostics and output ratiometricity to VCC in Output Stage . Go
  • Added Undervoltage Diagnostics , Initialization Diagnostics , Normal State Diagnostics and Fault State Diagnostics to list details on the diagnsostics available in LDC5072-Q1 Go
  • Added details for device functional modes. Added Figure 8-5 and described each of the states in LDC5072-Q1 Go
  • Updated application diagram in #GUID-60FF0E0F-8E11-4618-A125-98A79A441464/TITLE-SNOSD47X3280 and updated Table 9-1 with new optional component values for EMC robustnessGo
  • Updated application diagram in #GUID-CE9EA5E1-FC6D-4AB3-8A5E-63C0679CC3C1/TITLE-SNOSD47T4809372-73 with new optional component values for EMC robustnessGo
  • Updated application diagram in Section 9.2.3 with new optional component values for EMC robustnessGo