SNOSD55 Data sheet

SNOSD55 June 2017 LF356-MIL

PRODUCTION DATA.

Package Options

Mechanical Data (Package|Pins)

YS|0
LMC|8
- MMBC008B

Thermal pad, mechanical data (Package|Pins)

Orderable Information

snosd55_oa

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) ⁽¹⁾⁽¹⁾⁽²⁾

			MIN	MAX	UNIT
Supply voltage				±18	V
Differential input voltage				±30	V
Input voltage⁽²⁾				±16	V
Output short circuit duration			Continuous		—
T_JMAX		LMC package		115	°C
		P package		100
		D package		100
Soldering information (lead temp.)	TO-99 package	Soldering (10 sec.)		300	°C
	PDIP package	Soldering (10 sec.)		260
	SOIC package	Vapor phase (60 sec.)		215
	SOIC package	Infrared (15 sec.)		220
Storage temperature, T_stg			−65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) If Military/Aerospace specified devices are required, contact the TI Sales Office/Distributors for availability and specifications.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾⁽²⁾	±1000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) 100 pF discharged through 1.5-kΩ resistor

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	NOM	MAX	UNIT
Supply voltage, V_S				±15	V
T_A		0	T_A	70	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		LF356-MIL		UNIT
		D (SOIC)	P (PDIP)
		8 PINS	8 PINS
R_θJA	Junction-to-ambient thermal resistance	112.5	55.2	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	58.8	44.5	°C/W
R_θJB	Junction-to-board thermal resistance	52.8	32.4	°C/W
ψ_JT	Junction-to-top characterization parameter	12.8	21.7	°C/W
ψ_JB	Junction-to-board characterization parameter	52.3	32.3	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 AC Electrical Characteristics, T_A = T_J = 25°C, V_S = ±15 V

PARAMETER		TEST CONDITIONS		TYP	UNIT
SR	Slew Rate	A_V = 1		12	V/μs
GBW	Gain Bandwidth Product			5	MHz
t_s	Settling Time to 0.01%⁽¹⁾			1.5	μs
e_n	Equivalent Input Noise Voltage	R_S = 100 Ω	f = 100 Hz	15	nV/√Hz
e_n	Equivalent Input Noise Voltage	R_S = 100 Ω	f = 1000 Hz	12	nV/√Hz
i_n	Equivalent Input Current Noise	f = 100 Hz		0.01	pA/√Hz
i_n	Equivalent Input Current Noise	f = 1000 Hz		0.01	pA/√Hz
C_IN	Input Capacitance			3	pF

(1) Settling time is defined here, for a unity gain inverter connection using 2-kΩ resistors for the LF15x. It is the time required for the error voltage (the voltage at the inverting input pin on the amplifier) to settle to within 0.01% of its final value from the time a 10-V step input is applied to the inverter. For the LF357, A_V = −5, the feedback resistor from output to input is 2 kΩ and the output step is 10 V (See Settling Time Test Circuit).

6.6 DC Electrical Characteristics, T_A = T_J = 25°C, V_S = ±15 V

PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
Supply current			5	10	mA

6.7 DC Electrical Characteristics

See ⁽¹⁾

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
V_OS	Input offset voltage	R_S = 50 Ω	T_A = 25°C		3	10	mV
V_OS	Input offset voltage	R_S = 50 Ω	Over temperature			13	mV
ΔV_OS/ΔT	Average TC of input offset voltage	R_S = 50 Ω			5		μV/°C
ΔTC/ΔV_OS	Change in average TC with V_OS adjust	R_S = 50 Ω⁽³⁾			0.5		μV/°C per mV
I_OS	Input offset current	T_J = 25°C⁽¹⁾ ⁽⁴⁾			3	50	pA
I_OS	Input offset current	T_J ≤ T_HIGH				2	nA
I_B	Input bias current	T_J = 25°C⁽¹⁾ ⁽⁴⁾			30	200	pA
I_B	Input bias current	T_J ≤ T_HIGH				8	nA
R_IN	Input resistance	T_J = 25°C			10¹²		Ω
A_VOL	Large signal voltage gain	V_S = ±15 V, V_O = ±10 V, R_L = 2 kΩ	T_A = 25°C	25	200		V/mV
A_VOL	Large signal voltage gain	V_S = ±15 V, V_O = ±10 V, R_L = 2 kΩ	Over temperature	15			V/mV
V_O	Output voltage swing	V_S = ±15 V, R_L = 10 kΩ		±12	±13		V
V_O	Output voltage swing	V_S = ±15 V, R_L= 2 kΩ		±10	±12		V
V_CM	Input common-mode voltage range	V_S = ±15 V	V_{CM, High}	10	15.1		V
V_CM	Input common-mode voltage range	V_S = ±15 V	V_{CM, Low}		−12	–10	V
CMRR	Common-mode rejection ratio			80	100		dB
PSRR	Supply voltage rejection ratio⁽⁵⁾			80	100		dB

(1) Unless otherwise stated, these test conditions apply:


Supply Voltage, V_S	V_S = ±15 V
T_A	0°C ≤ T_A ≤ +70°C
T_HIGH	+70°C

and V_OS, I_B and I_OS are measured at V_CM = 0.

(2) Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.

(3) The Temperature Coefficient of the adjusted input offset voltage changes only a small amount (0.5 μV/°C typically) for each mV of adjustment from its original unadjusted value. Common-mode rejection and open-loop voltage gain are also unaffected by offset adjustment.

(4) The input bias currents are junction leakage currents which approximately double for every 10°C increase in the junction temperature, T_J. Due to limited production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, Pd. T_J = T_A + θ_JA Pd where θ_JA is the thermal resistance from junction to ambient. Use of a heat sink is recommended if input bias current is to be kept to a minimum.

(5) Supply Voltage Rejection is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with common practice.

6.8 Power Dissipation Ratings

		MAX	UNIT
Power Dissipation at T_A = 25°C ⁽¹⁾ ⁽²⁾	LMC Package (Still Air)	400	mW
	LMC Package (400 LF/Min Air Flow)	1000
	P Package	670
	D Package	380

(1) The maximum power dissipation for these devices must be derated at elevated temperatures and is dictated by T_JMAX, θ_JA, and the ambient temperature, T_A. The maximum available power dissipation at any temperature is P_D = (T_JMAX − T_A) / θ_JA or the 25°C P_dMAX, whichever is less.

(2) Maximum power dissipation is defined by the package characteristics. Operating the part near the maximum power dissipation may cause the part to operate outside specified limits.