SNVSBJ6A March   2020  – August 2020 LM25184-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Integrated Power MOSFET
      2. 7.3.2  PSR Flyback Modes of Operation
      3. 7.3.3  Setting the Output Voltage
        1. 7.3.3.1 Diode Thermal Compensation
      4. 7.3.4  Control Loop Error Amplifier
      5. 7.3.5  Precision Enable
      6. 7.3.6  Configurable Soft Start
      7. 7.3.7  External Bias Supply
      8. 7.3.8  Minimum On-Time and Off-Time
      9. 7.3.9  Overcurrent Protection
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design 1: Wide VIN, Low IQ PSR Flyback Converter Rated at 12 V, 1 A
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2  Custom Design With Excel Quickstart Tool
          3. 8.2.1.2.3  Flyback Transformer – T1
          4. 8.2.1.2.4  Flyback Diode – DFLY
          5. 8.2.1.2.5  Leakgae Inductance Clamp Circuit – DF, DCLAMP
          6. 8.2.1.2.6  Output Capacitor – COUT
          7. 8.2.1.2.7  Input Capacitor – CIN
          8. 8.2.1.2.8  Feedback Resistor – RFB
          9. 8.2.1.2.9  Thermal Compensation Resistor – RTC
          10. 8.2.1.2.10 UVLO Resistors – RUV1, RUV2
          11. 8.2.1.2.11 Soft-Start Capacitor – CSS
          12.        50
      2. 8.2.2 Application Curves
      3. 8.2.3 Design 2: PSR Flyback Converter With Dual Outputs of 15 V and –8 V at 0.5 A
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
          1. 8.2.3.2.1 Flyback Transformer – T1
          2. 8.2.3.2.2 Flyback Diodes – DFLY1 and DFLY2
          3. 8.2.3.2.3 Input Capacitor – CIN
          4. 8.2.3.2.4 Output Capacitors – COUT1, COUT2
          5. 8.2.3.2.5 Feedback Resistor – RFB
          6. 8.2.3.2.6 Thermal Compensation Resistor – RTC
          7. 8.2.3.2.7 Output Voltage Clamp Zeners – DOUT1 and DOUT2
        3. 8.2.3.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.1 Layout Guidelines

PCB layout is critical for good power supply design. There are several paths that conduct high slew-rate currents or voltages that can interact with transformer leakage inductance or parasitic capacitance to generate noise and EMI or degrade the performance of the power supply.

  1. Bypass VIN to GND with a low-ESR ceramic capacitor, preferably of X7R or X7S dielectric. Place CIN as close as possible to the LM25184-Q1 VIN and GND pins. Ground return paths for the input capacitor or capacitors must consist of localized top-side planes that connect to the GND pin and exposed PAD.
  2. Minimize the loop area formed by the input capacitor connections and the VIN and GND pins.
  3. Locate the transformer close to the SW pin. Minimize the area of the SW trace or plane to prevent excessive e-field or capacitive coupling.
  4. Minimize the loop area formed by the diode-Zener clamp circuit connections and the primary winding terminals of the transformer.
  5. Minimize the loop area formed by the flyback rectifying diode, output capacitor, and the secondary winding terminals of the transformer.
  6. Tie the GND pin directly to the DAP under the device and to a heat-sinking PCB ground plane.
  7. Use a ground plane in one of the middle layers as a noise shielding and heat dissipation path.
  8. Have a single-point ground connection to the plane. Route the return connections for the reference resistor, soft start, and enable components directly to the GND pin. This prevents any switched or load currents from flowing in analog ground traces. If not properly handled, poor grounding results in degraded load regulation or erratic output voltage ripple behavior.
  9. Make VIN+, VOUT+, and ground bus connections short and wide. This reduces any voltage drops on the input or output paths of the converter and maximizes efficiency.
  10. Minimize trace length to the FB pin. Locate the feedback resistor close to the FB pin.
  11. Locate components RSET, RTC, and CSS as close as possible to their respective pins. Route with minimal trace lengths.
  12. Place a capacitor between input and output return connections to route common-mode noise currents directly back to their source.
  13. Provide adequate heatsinking for the LM25184-Q1 to keep the junction temperature below 150°C. For operation at full rated load, the top-side ground plane is an important heat-dissipating area. Use an array of heat-sinking vias to connect the DAP to the PCB ground plane. If the PCB has multiple copper layers, connect these thermal vias to inner-layer ground planes. The connection to VOUT+ provides heatsinking for the flyback diode.