SNVSAJ8D February 2016 – March 2018 LM36273
PRODUCTION DATA.
Efficiency is maximized when the lowest ƒSAMPLE is chosen because this lowers the quiescent operating current of the device. Table 4 describes the typical efficiency tradeoffs for the different sample clock settings.
PWM SAMPLE RATE (ƒSAMPLE) | TYPICAL INPUT CURRENT, DEVICE ENABLED ILED = 10 mA/string, 3 × 6 LEDs | TYPICAL EFFICIENCY | |||
---|---|---|---|---|---|
0x03 Bit[2] | 0x12 Bit[0] | ƒSW = 1 MHz | VIN = 3.7 V | ||
0 | 0 | 1.685 mA | 87.7% | ||
1 | 0 | 1.756 mA | 87.66% | ||
X | 1 | 2.479 mA | 87.2% |