SNVS867 June   2014 LM3633

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Bank Mapping
        1. 7.3.1.1 High-Voltage Control Banks (A and B)
        2. 7.3.1.2 Low-Voltage Control Banks (C, D, E, F, G, and H)
      2. 7.3.2 Pattern Generator
      3. 7.3.3 PWM Input
      4. 7.3.4 HWEN Input
      5. 7.3.5 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 High-Voltage LED Control
        1. 7.4.1.1  High-Voltage Boost Converter
        2. 7.4.1.2  High-Voltage Current Sinks (HVLED1, HVLED2 and HVLED3)
        3. 7.4.1.3  High-Voltage Current String Biasing
        4. 7.4.1.4  Boost Switching-Frequency Select
        5. 7.4.1.5  Automatic Switching Frequency Shift
        6. 7.4.1.6  Brightness Register Current Control
          1. 7.4.1.6.1 8-Bit Control (Preferred)
          2. 7.4.1.6.2 11-Bit Control
        7. 7.4.1.7  PWM Control
          1. 7.4.1.7.1 PWM Input Frequency Range
          2. 7.4.1.7.2 PWM Input Polarity
          3. 7.4.1.7.3 PWM Zero Detection
        8. 7.4.1.8  Start-up/Shutdown Ramp
        9. 7.4.1.9  Run-Time Ramp
        10. 7.4.1.10 High-Voltage Control A/B Ramp Select
        11. 7.4.1.11 LED Current Mapping Modes
        12. 7.4.1.12 Exponential Mapping
          1. 7.4.1.12.1 8-Bit Code Calculation
          2. 7.4.1.12.2 11-Bit Code Calculation
        13. 7.4.1.13 Linear Mapping
          1. 7.4.1.13.1 8-Bit Code Calculation
          2. 7.4.1.13.2 11-Bit Code Calculation
      2. 7.4.2 Low-Voltage LED Control
        1. 7.4.2.1  Integrated Charge Pump
        2. 7.4.2.2  Charge Pump Disabled
        3. 7.4.2.3  Automatic Gain
        4. 7.4.2.4  Automatic Gain (Flying Capacitor Detection)
        5. 7.4.2.5  1X Gain
        6. 7.4.2.6  2X Gain
        7. 7.4.2.7  Low-Voltage Current Sinks (LVLED1 to LVLED6)
        8. 7.4.2.8  Low-Voltage LED Biasing
        9. 7.4.2.9  Brightness Register Current Control
        10. 7.4.2.10 LED Current Mapping Modes
        11. 7.4.2.11 Exponential Mapping
        12. 7.4.2.12 Linear Mapping
        13. 7.4.2.13 Start-up/Shutdown Ramp
        14. 7.4.2.14 Run-Time Ramp
      3. 7.4.3 Low-Voltage LED Pattern Generator
        1. 7.4.3.1 Delay Time
        2. 7.4.3.2 Rise Time
        3. 7.4.3.3 Fall Time
        4. 7.4.3.4 High Period
        5. 7.4.3.5 Low Period
        6. 7.4.3.6 Low-Level Brightness
        7. 7.4.3.7 High-Level Brightness
      4. 7.4.4 Fault Flags/Protection Features
        1. 7.4.4.1 Open LED String (HVLED)
        2. 7.4.4.2 Shorted LED String (HVLED)
        3. 7.4.4.3 Open LED (LVLED)
        4. 7.4.4.4 Shorted LED (LVLED)
        5. 7.4.4.5 Overvoltage Protection (Inductive Boost)
        6. 7.4.4.6 Current Limit (Inductive Boost)
        7. 7.4.4.7 Current Limit (Charge Pump)
      5. 7.4.5 I2C-Compatible Interface
        1. 7.4.5.1 Start and Stop Conditions
        2. 7.4.5.2 I2C-Compatible Address
        3. 7.4.5.3 Transferring Data
    5. 7.5 Register Descriptions
      1. 7.5.1 Pattern Generator Registers
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Boost Converter Maximum Output Power (Boost)
          1. 8.2.2.1.1 Peak Current Limited
          2. 8.2.2.1.2 Output Voltage Limited
        2. 8.2.2.2 Boost Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Schottky Diode Selection
        5. 8.2.2.5 Input Capacitor Selection
        6. 8.2.2.6 Maximum Output Power (Charge Pump)
        7. 8.2.2.7 Charge Pump Flying Capacitor Selection
        8. 8.2.2.8 Charge Pump Output Capacitor Selection
        9. 8.2.2.9 Charge Pump Input Capacitor Selection
      3. 8.2.3 Application Performance Plots
    3. 8.3 Initialization Set Up
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines (Boost)
      1. 10.1.1 Boost Output Capacitor Placement
      2. 10.1.2 Schottky Diode Placement
      3. 10.1.3 Inductor Placement
      4. 10.1.4 Boost Input Capacitor Placement
    2. 10.2 Layout Guidelines (Charge Pump)
      1. 10.2.1 Flying Capacitor (CP) Placement
      2. 10.2.2 Output Capacitor (CPOUT) Placement
      3. 10.2.3 Charge Pump Input Capacitor Placement
    3. 10.3 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DSBGA (YFQ)
20 PINS
Pkg_outline.gif

Pin Functions

PIN DESCRIPTION
NAME NUMBER
C− A1 Integrated charge pump flying capacitor negative pin. Connect a 1-µF ceramic capacitor between C+ and C−.
C+ A2 Integrated charge pump flying capacitor positive pin. Connect a 1-µF ceramic capacitor between C+ and C−.
CPOUT A3 Integrated charge pump output pin. Bypass CPOUT to GND with a 1-µF ceramic capacitor.
IN A4 Input voltage connection. Bypass IN to GND with a minimum 2.2-µF ceramic capacitor.
HVLED1 B1 Input pin to high-voltage current sink 1 (40 V max). The boost converter regulates the minimum of HVLED1, HVLED2 and HVLED3 to VHR.
SDA B2 Serial data connection for I2C-Compatible Interface.
OVP B3 Overvoltage sense input. Connect OVP to the positive pin of the inductive boost output capacitor (COUT).
GND B4 Ground
HVLED2 C1 Input pin to high-voltage current sink 2 (40 V max). The boost converter regulates the minimum of HVLED1, HVLED2 and HVLED3 to VHR.
SCL C2 Serial clock connection for I2C-Compatible Interface.
PWM C3 PWM brightness control input for CABC operation. PWM is a high-impedance input and cannot be left floating.
SW C4 Drain connection for the internal NFET. Connect SW to the junction of the inductor and the Schottky diode anode.
HVLED3 D1 Input pin to high-voltage current sink 3 (40 V max). The boost converter regulates the minimum of HVLED1, HVLED2 and HVLED3 to VHR.
HWEN D2 Hardware enable input. Drive this pin high to enable the device. Drive this pin low to force the device into a low power shutdown. HWEN is a high-impedance input and cannot be left floating.
LVLED6 D3 Low-voltage current sink 6
LVLED5 D4 Low-voltage current sink 5
LVLED1 E1 Low-voltage current sink 1
LVLED2 E2 Low-voltage current sink 2
LVLED3 E3 Low-voltage current sink 3
LVLED4 E4 Low-voltage current sink 4