SNOS455G
May 2000 – September 2015
LM4050-N
,
LM4050-N-Q1
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics: 2-V Option
6.6
Electrical Characteristics: 2.5-V Option
6.7
Electrical Characteristics: 4.1-V Option
6.8
Electrical Characteristics: 5-V Option
6.9
Electrical Characteristics: 8.2-V Option
6.10
Electrical Characteristics: 10-V Option
6.11
Typical Characteristics
6.11.1
Start-Up Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Shunt Regulator
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curve
9.2.2
Precision Reference for an Analog-to-Digital Converter
9.2.2.1
Design Requirements
9.2.2.2
Detailed Design Procedure
9.2.3
VOUT Bounded Amplifier
9.2.3.1
Design Requirements
9.2.3.2
Detailed Design Procedure
9.2.4
VIN Bounded Amplifier
9.2.4.1
Design Requirements
9.2.4.2
Detailed Design Procedure
9.2.5
±4.096 Precision Reference
9.2.5.1
Design Requirements
9.2.5.2
Detailed Design Procedure
9.2.6
±1-mA Precision Current Sources
9.2.6.1
Design Requirements
9.2.6.2
Detailed Design Procedure
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Related Links
12.2
Community Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DBZ|3
MPDS108G
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snos455g_oa
snos455g_pm
7 Parameter Measurement Information
Figure 9. Test Circuit