SLVSFF1B December 2021 – December 2022 LM5123-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The device features a current sense amplifier with an effective gain of 10 (ACS), and provides an internal slope compensation ramp to the PWM comparator to prevent a subharmonic oscillation at high duty cycle. The device generates the 45-mV peak slope compensation ramp (VSLOPE) at the input of the current sense amplifier, which is a 0.45-V peak (at 100% duty cycle) slope compensation ramp at the PWM comparator input.
According to peak current mode control theory, the slope of the slope compensation ramp must be greater than at least half of the sensed inductor current falling slope to prevent subharmonic oscillation at high duty cycle. Therefore, the minimum amount of the slope compensation must satisfy Equation 11.
where