SNVSC09
March 2022
LM5143
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Device Comparison Table
7
Pin Configuration and Functions
8
Specifications
8.1
Absolute Maximum Ratings
8.2
ESD Ratings
8.3
Recommended Operating Conditions
8.4
Thermal Information
8.5
Electrical Characteristics
8.6
Switching Characteristics
8.7
Typical Characteristics
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Input Voltage Range (VIN)
9.3.2
High-Voltage Bias Supply Regulator (VCC, VCCX, VDDA)
9.3.3
Enable (EN1, EN2)
9.3.4
Power-Good Monitor (PG1, PG2)
9.3.5
Switching Frequency (RT)
9.3.6
Clock Synchronization (DEMB)
9.3.7
Synchronization Out (SYNCOUT)
9.3.8
Spread Spectrum Frequency Modulation (DITH)
9.3.9
Configurable Soft Start (SS1, SS2)
9.3.10
Output Voltage Setpoint (FB1, FB2)
9.3.11
Minimum Controllable On Time
9.3.12
Error Amplifier and PWM Comparator (FB1, FB2, COMP1, COMP2)
9.3.13
Slope Compensation
9.3.14
Inductor Current Sense (CS1, VOUT1, CS2, VOUT2)
9.3.14.1
Shunt Current Sensing
9.3.14.2
Inductor DCR Current Sensing
9.3.15
Hiccup Mode Current Limiting (RES)
9.3.16
High-Side and Low-Side Gate Drivers (HO1/2, LO1/2, HOL1/2, LOL1/2)
9.3.17
Output Configurations (MODE, FB2)
9.3.17.1
Independent Dual-Output Operation
9.3.17.2
Single-Output Interleaved Operation
9.3.17.3
Single-Output Multiphase Operation
9.4
Device Functional Modes
9.4.1
Standby Modes
9.4.2
Diode Emulation Mode
9.4.3
Thermal Shutdown
10
Application and Implementation
10.1
Application Information
10.1.1
Power Train Components
10.1.1.1
Buck Inductor
10.1.1.2
Output Capacitors
10.1.1.3
Input Capacitors
10.1.1.4
Power MOSFETs
10.1.1.5
EMI Filter
10.1.2
Error Amplifier and Compensation
10.2
Typical Applications
10.2.1
Design 1 – 5-V and 3.3-V Dual-Output Buck Regulator for Computing Applications
10.2.1.1
Design Requirements
10.2.1.2
Detailed Design Procedure
10.2.1.2.1
Custom Design With WEBENCH® Tools
10.2.1.2.2
Custom Design With Excel Quickstart Tool
10.2.1.2.3
Inductor Calculation
10.2.1.2.4
Current-Sense Resistance
10.2.1.2.5
Output Capacitors
10.2.1.2.6
Input Capacitors
10.2.1.2.7
Compensation Components
10.2.1.3
Application Curves
10.2.2
Design 2 – Two-Phase, 15-A, 2.1-MHz Single-Output Buck Regulator for Server Applications
10.2.2.1
Design Requirements
10.2.2.2
Detailed Design Procedure
10.2.2.3
Application Curves
10.2.3
Design 3 – Two-Phase, 50-A, 300-kHz Single-Output Buck Regulator for ASIC Power Applications
10.2.3.1
Design Requirements
10.2.3.2
Detailed Design Procedure
10.2.3.3
Application Curves
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.1.1
Power Stage Layout
12.1.2
Gate-Drive Layout
12.1.3
PWM Controller Layout
12.1.4
Thermal Design and Layout
12.1.5
Ground Plane Design
12.2
Layout Example
13
Device and Documentation Support
13.1
Device Support
13.1.1
Third-Party Products Disclaimer
13.1.2
Development Support
13.1.2.1
Custom Design With WEBENCH® Tools
13.2
Documentation Support
13.2.1
Related Documentation
13.2.1.1
PCB Layout Resources
13.2.1.2
Thermal Design Resources
13.3
Receiving Notification of Documentation Updates
13.4
Support Resources
13.5
Trademarks
13.6
Electrostatic Discharge Caution
13.7
Glossary
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RHA|40
MPQF135D
Thermal pad, mechanical data (Package|Pins)
RHA|40
QFND660
Orderable Information
snvsc09_oa
snvsc09_pm
10.2.2.3
Application Curves
Figure 10-22
Efficiency Versus I
OUT
, 5-V Output
Configure the regulator as a 3.3-V output by tying FB1 to VDDA.
Figure 10-23
Efficiency Versus I
OUT
, 3.3-V Output