SNVSC09 March 2022 LM5143
PRODUCTION DATA
Figure 10-24 shows the schematic diagram of a single-output, two-phase synchronous buck regulator with an output voltage of 5 V. The expected DC load current is 35 A with transients up to 50 A. In this example, the target efficiency at 35 A is 94.5% using a power stage optimized for a nominal input voltage of 48 V. The switching frequency is set at 300 kHz by resistor RRT, and inductor DCR current sensing is used to mitigate shunt-related losses at high current. The 5-V output is connected to VCCX to reduce IC bias power dissipation and improve light-load efficiency. An output voltage of 3.3 V is also feasible simply by connecting FB1 to VDDA.