SLVSFF2A
February 2022 – April 2022
LM5152-Q1
,
LM51521-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Device Comparison Table
7
Pin Configuration and Functions
8
Specifications
8.1
Absolute Maximum Ratings
8.2
ESD Ratings
8.3
Recommended Operating Conditions
8.4
Thermal Information
8.5
Electrical Characteristics
8.6
Typical Characteristics
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Device Enable/Disable (EN, VH Pin)
9.3.2
High Voltage VCC Regulator (BIAS, VCC Pin)
9.3.3
Light Load Switching Mode Selection (MODE Pin)
9.3.4
Line Undervoltage Lockout (UVLO Pin)
9.3.5
Fast Restart Using VCC HOLD (VH Pin)
9.3.6
Adjustable Output Regulation Target (VOUT, TRK, VREF Pin)
9.3.7
Overvoltage Protection (VOUT Pin)
9.3.8
Boost Status Indicator (STATUS Pin)
9.3.9
Dynamically Programmable Switching Frequency (RT)
9.3.10
External Clock Synchronization (SYNC Pin)
9.3.11
Programmable Spread Spectrum (DITHER Pin)
9.3.12
Programmable Soft Start (SS Pin)
9.3.13
Wide Bandwidth Transconductance Error Amplifier and PWM (TRK, COMP Pin)
9.3.14
Current Sensing and Slope Compensation (CSP, CSN Pin)
9.3.15
Constant Peak Current Limit (CSP, CSN Pin)
9.3.16
Maximum Duty Cycle and Minimum Controllable On-Time Limits
9.3.17
Deep Sleep Mode and Bypass Operation (HO, CP Pin)
9.3.18
MOSFET Drivers, Integrated Boot Diode, and Hiccup Mode Fault Protection (LO, HO, HB Pin)
9.3.19
Thermal Shutdown Protection
9.4
Device Functional Modes
9.4.1
Device Status
9.4.1.1
Shutdown Mode
9.4.1.2
Configuration Mode
9.4.1.3
Active Mode
9.4.1.4
Sleep Mode
9.4.1.5
Deep Sleep Mode
9.4.2
Light Load Switching Mode
9.4.2.1
Forced PWM (FPWM) Mode
9.4.2.2
Diode Emulation (DE) Mode
9.4.2.3
Forced Diode Emulation Operation in FPWM Mode
9.4.2.4
Skip Mode
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Application Ideas
10.2.3
Application Curves
10.3
System Example
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
Device and Documentation Support
13.1
Device Support
13.1.1
Third-Party Products Disclaimer
13.2
Receiving Notification of Documentation Updates
13.3
Support Resources
13.4
Trademarks
13.5
Electrostatic Discharge Caution
13.6
Glossary
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RGR|20
MPQF239A
Thermal pad, mechanical data (Package|Pins)
RGR|20
QFND664
Orderable Information
slvsff2a_oa
slvsff2a_pm
10.2.3
Application Curves
Figure 10-4
Efficiency vs. I
OUT
, V
OUT
= 8.5 V (FPWM)
Figure 10-6
8.5-V Load Regulation
Figure 10-5
Efficiency vs. I
OUT
, V
OUT
= 8.5-V Light Load