SNVSAJ3C March 2016 – December 2022 LM5165-Q1
PRODUCTION DATA
Figure 7-1 and Figure 7-2 show converter schematics for PFM and COT modes of operation.
The LM5165-Q1 operates in PFM mode when RT is shorted to GND. Configured as such, the LM5165-Q1 behaves as a hysteretic voltage regulator operating in boundary conduction mode, controlling the output voltage within upper and lower hysteresis levels according to the PFM feedback comparator hysteresis of 10 mV. Figure 7-3 is a representation of the relevant output voltage and inductor current waveforms. The LM5165-Q1 provides the required switching pulses to recharge the output capacitor, followed by a sleep period where most of the internal circuits are shut off. The load current is supported by the output capacitor during this time, and the LM5165-Q1 current consumption approaches the sleep quiescent current of 10.5 µA. The sleep period duration depends on load current and output capacitance.
When operating in PFM mode at given input and output voltages, the chosen filter inductance dictates the PFM pulse frequency in Equation 1:
where
Configured in COT mode, the LM5165-Q1 based converter turns on the high-side MOSFET with on-time inversely proportional to VIN to operate with essentially fixed switching frequency when in continuous conduction mode (CCM). Diode emulation mode (DEM) prevents negative inductor current, and pulse skipping maintains highest efficiency at light load currents by decreasing the effective switching frequency. The COT-controlled LM5165-Q1 waveforms in CCM and DEM are represented in Figure 7-4. The PWM on-time is set by resistor RRT connected from RT to GND as shown in Figure 7-2. The control loop maintains a constant output voltage by adjusting the PWM off-time.
The required on-time adjust resistance for a particular frequency is given in Equation 2 and tabulated in Table 7-1. The maximum programmable on-time is 15 µs.
FSW (kHz) | RRT (kΩ) | |||
---|---|---|---|---|
VOUT = 1.8 V | VOUT = 3.3 V | VOUT = 5 V | VOUT = 12 V | |
100 | 102 | 187 | 287 | 681 |
200 | 51.1 | 95.3 | 143 | 240 |
300 | 34 | 63.4 | 95.3 | 226 |
400 | 25.5 | 47.5 | 71.5 | 169 |
500 | 20.5 | 37.4 | 57.6 | 137 |
600 | 16.9 | 31.6 | 47.5 | 115 |
The choice of control mode and switching frequency requires a compromise between conversion efficiency, quiescent current, and passive component size. Lower switching frequency implies reduced switching losses (including gate charge losses, transition losses, and so forth) and higher overall efficiency. Higher switching frequency, on the other hand, implies a smaller LC output filter and hence a more compact design. Lower inductance also helps transient response as the large-signal slew rate of inductor current increases. The ideal switching frequency in a given application is a tradeoff and thus is determined on a case-by-case basis. It relates to the input voltage, output voltage, most frequent load current level(s), external component choices, and circuit size requirement. At light loads, the PFM converter has a relatively longer sleep time interval and thus operates with lower input quiescent current and higher efficiency.