SNVSBU4E June   2022  – August 2024 LM5177

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Handling Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Gate Driver Rise Time and Fall Time
    2. 6.2 Gate Driver Dead (Transition) Time
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power-On Reset (POR System)
      2. 7.3.2  Buck-Boost Control Scheme
        1. 7.3.2.1 Boost Mode
        2. 7.3.2.2 Buck Mode
        3. 7.3.2.3 Buck-Boost Mode
      3. 7.3.3  Power Save Mode
      4. 7.3.4  Supply Voltage Selection – VMAX Switch
      5. 7.3.5  Enable and Undervoltage Lockout
      6. 7.3.6  Oscillator Frequency Selection
      7. 7.3.7  Frequency Synchronization
      8. 7.3.8  Voltage Regulation Loop
      9. 7.3.9  Output Voltage Tracking
      10. 7.3.10 Slope Compensation
      11. 7.3.11 Configurable Soft Start
      12. 7.3.12 Peak Current Sensor
      13. 7.3.13 Current Monitoring and Current Limit Control Loop
      14. 7.3.14 Short Circuit - Hiccup Protection
      15. 7.3.15 nFLT Pin and Protections
      16. 7.3.16 Device Configuration Pin
      17. 7.3.17 Dual Random Spread Spectrum – DRSS
      18. 7.3.18 Gate Driver
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design with WEBENCH Tools
        2. 8.2.2.2  Frequency
        3. 8.2.2.3  Feedback Divider
        4. 8.2.2.4  Inductor and Current Sense Resistor Selection
        5. 8.2.2.5  Slope Compensation
        6. 8.2.2.6  Output Capacitor
        7. 8.2.2.7  Input Capacitor
        8. 8.2.2.8  UVLO Divider
        9. 8.2.2.9  Soft-Start Capacitor
        10. 8.2.2.10 MOSFETs QH1 and QL1
        11. 8.2.2.11 MOSFETs QH2 and QL2
        12. 8.2.2.12 Frequency Compensation
        13. 8.2.2.13 External Component Selection
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
      1. 8.3.1 Bi-Directional Power Backup
      2. 8.3.2 Parallel (Multiphase) Operation
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Power Stage Layout
      2. 10.1.2 Gate Driver Layout
      3. 10.1.3 Controller Layout
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design with WEBENCH Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.1 Absolute Maximum Ratings

Over the recommended operating junction temperature range of –40°C to 150°C (unless otherwise specified)(1)
MIN MAX UNIT
Input BIAS to AGND –0.3 50 V
Input VIN to AGND –0.3 85 V
Input EN/UVLO to AGND –0.3 V(VIN) + 0.3 V
Input ATRK/SS, DTRK, RT, SYNC, MODE, SLOPE, CFG, to AGND(2) –0.3 5.8 V
Input FB to AGND –0.3 5.8 V
Input CSA, CSB  to AGND (DC) –5 85 V
Input SW1, SW2  to AGND (DC) –5 85 V
Input HB1 to SW1, CSA, CSB
 –0.3 5.5(5) V
Input –0.3 6.4 V
Input HB2 to SW2, CSA, CSB –0.3 5.5(5) V
Input –0.3 6.4 V
Input SW1 to CSA, CSB –0.3 0.3 V
Input PGND to AGND –0.3 0.3 V
Output VCC to AGND –0.3 5.5 V
Output VOUT to AGND –0.3 85 V
Output LO1, LO2 to PGND (DC)
 –0.3 V(VCC)+0.3 V
Output nFLT to AGND –0.3 5.8 V
Output HO1 to SW1
 -0.3 V(HB1)+0.3 V
Output HO2 to SW2 -0.3 V(HB2)+0.3 V
Output HO1, HO2, ISNSP, ISNSN, HB1, HB2  to AGND (DC) –0.3 85 V
Output COMP, IMONOUT to AGND(3) –0.3 5.8 V
Storage temperature, TSTG –55 150 °C
Operating junction temperature, TJ(4) –40 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) This pin is not specified to have an external voltage applied.
(3) This pin has an internal max voltage clamp which can handle up to 1.6mA.
(4) High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.
(5) Operating lifetime is de-rated for voltage bigger than the specified maximum