SNVSCR9A October   2024  – December 2024 LM61480T-Q1 , LM61495T-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Output Voltage Selection
      2. 7.3.2  Enable EN Pin and Use as VIN UVLO
      3. 7.3.3  SYNC/MODE Uses for Synchronization
      4. 7.3.4  Clock Locking
      5. 7.3.5  Adjustable Switching Frequency
      6. 7.3.6  RESET Output Operation
      7. 7.3.7  Internal LDO, VCC UVLO, and BIAS Input
      8. 7.3.8  Bootstrap Voltage and VCBOOT-UVLO (CBOOT Pin)
      9. 7.3.9  Adjustable SW Node Slew Rate
      10. 7.3.10 Spread Spectrum
      11. 7.3.11 Soft Start and Recovery From Dropout
      12. 7.3.12 Overcurrent and Short-Circuit Protection
      13. 7.3.13 Hiccup
      14. 7.3.14 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
        1. 7.4.3.1 Peak Current Mode Operation
        2. 7.4.3.2 Auto Mode Operation
          1. 7.4.3.2.1 Diode Emulation
        3. 7.4.3.3 FPWM Mode Operation
        4. 7.4.3.4 Minimum On-time (High Input Voltage) Operation
        5. 7.4.3.5 Dropout
        6. 7.4.3.6 Recovery from Dropout
        7. 7.4.3.7 Other Fault Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Choosing the Switching Frequency
        2. 8.2.2.2  Setting the Output Voltage
        3. 8.2.2.3  Inductor Selection
        4. 8.2.2.4  Output Capacitor Selection
        5. 8.2.2.5  Input Capacitor Selection
        6. 8.2.2.6  BOOT Capacitor
        7. 8.2.2.7  BOOT Resistor
        8. 8.2.2.8  VCC
        9. 8.2.2.9  CFF and RFF Selection
        10. 8.2.2.10 RSPSP Selection
        11. 8.2.2.11 RT Selection
        12. 8.2.2.12 RMODE Selection
        13. 8.2.2.13 External UVLO
        14. 8.2.2.14 Maximum Ambient Temperature
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Ground and Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Glossary
    7. 9.7 Electrostatic Discharge Caution
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.12 Overcurrent and Short-Circuit Protection

The LM614xxT-Q1 is protected from overcurrent conditions by cycle-by-cycle current limiting on both the high-side and the low-side MOSFETs.

High-side MOSFET overcurrent protection is implemented by the nature of the peak current mode control. The HS switch current is sensed when the HS is turned on after a short blanking time. The HS switch current is compared to the minimum of a fixed current setpoint, or the output of the voltage regulation loop minus slope compensation, every switching cycle. Because the voltage loop has a maximum value and slope compensation increases with duty cycle, the HS current limit decreases with increased duty cycle if duty cycle is above 35%. See Figure 7-15.

LM61480T-Q1 LM61495T-Q1 Maximum Current Allowed Through the HS FET - Function of Duty Cycle for LM61495T-Q1 Figure 7-15 Maximum Current Allowed Through the HS FET - Function of Duty Cycle for LM61495T-Q1

When the LS switch is turned on, the current going through is also sensed and monitored. Like the high-side device, the low-side device turn-off is commanded by the voltage control loop. For a low-side device, turn-off is prevented if current exceeds this value, even if the oscillator normally starts a new switching cycle. See Section 7.4.3.4. Also like the high-side device, there is a limit on how high the turn-off current is allowed to be. This limit is called the low-side current limit; see the Electrical Characteristics for values. If the LS current limit is exceeded, the LS MOSFET stays on and the HS switch is not turned on. The LS switch is turned off after the LS current falls below the limit. The HS switch is turned on again as long as at least one clock period has passed since the last time the HS device has turned on.

LM61480T-Q1 LM61495T-Q1 Current Limit WaveformsFigure 7-16 Current Limit Waveforms

The net effect of the operation of high-side and low-side current limit is that the IC operates in hysteretic control. Because the current waveform assumes values between IL-HS and IL-LS, output current is close to the average of these two values unless duty cycle is very high. After operating in current limit, hysteretic control is used and current does not increase as output voltage approaches zero.

If duty cycle is very high, current ripple must be very low to prevent instability; see Section 8.2.2.3. Because current ripple is low, the part is able to deliver full current. The current delivered is very close to IL-LS.

LM61480T-Q1 LM61495T-Q1 Output Voltage vs Output Current
Under most conditions, current is limited to the average of IL-HS and IL-LS, approximately 1.4 times the rated current. If input voltage is low, current can be limited to approximately IL-LS. Current does not exceed the average of IL-HS and IL-LS as output drops to 0.4 times the output voltage setting. Below 0.4 times the output voltage setting, the peak current does not exceed the average of IL-HS and IL-LS and the hiccup mode activates, preventing excessive heating.
Figure 7-17 Output Voltage vs Output Current

After the overload is removed, the device recovers as though in soft start; see Section 7.3.11. Note that hiccup can be triggered if output voltage drops below approximately 0.4 times the intended output voltage.