SNVSAW8E March   2020  – April 2022 LM62440-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Characteristics
    7. 8.7 Systems Characteristics
    8. 8.8 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  EN Uses for Enable and VIN UVLO
      2. 9.3.2  MODE/SYNC Pin Operation
        1. 9.3.2.1 Level-Dependent MODE/SYNC Pin Control
        2. 9.3.2.2 Pulse-Dependent MODE/SYNC Pin Control
        3. 9.3.2.3 Clock Locking
      3. 9.3.3  PGOOD Output Operation
      4. 9.3.4  Internal LDO, VCC UVLO, and BIAS Input
      5. 9.3.5  Bootstrap Voltage and VCBOOT-UVLO (CBOOT Pin)
      6. 9.3.6  Adjustable SW Node Slew Rate
      7. 9.3.7  Spread Spectrum
      8. 9.3.8  Soft Start and Recovery From Dropout
      9. 9.3.9  Output Voltage Setting
      10. 9.3.10 Overcurrent and Short Circuit Protection
      11. 9.3.11 Thermal Shutdown
      12. 9.3.12 Input Supply Current
    4. 9.4 Device Functional Modes
      1. 9.4.1 Shutdown Mode
      2. 9.4.2 Standby Mode
      3. 9.4.3 Active Mode
        1. 9.4.3.1 CCM Mode
        2. 9.4.3.2 Auto Mode – Light-Load Operation
          1. 9.4.3.2.1 Diode Emulation
          2. 9.4.3.2.2 Frequency Reduction
        3. 9.4.3.3 FPWM Mode – Light-Load Operation
        4. 9.4.3.4 Minimum On-Time (High Input Voltage) Operation
        5. 9.4.3.5 Dropout
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1  Choosing the Switching Frequency
        2. 10.2.2.2  Setting the Output Voltage
        3. 10.2.2.3  Inductor Selection
        4. 10.2.2.4  Output Capacitor Selection
        5. 10.2.2.5  Input Capacitor Selection
        6. 10.2.2.6  BOOT Capacitor
        7. 10.2.2.7  BOOT Resistor
        8. 10.2.2.8  VCC
        9. 10.2.2.9  BIAS
        10. 10.2.2.10 CFF and RFF Selection
        11. 10.2.2.11 External UVLO
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Ground and Thermal Considerations
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2.2.1 Choosing the Switching Frequency

The choice of switching frequency is a compromise between conversion efficiency and overall solution size. Lower switching frequency implies reduced switching losses and usually results in higher system efficiency. However, higher switching frequency allows for the use of smaller inductors and output capacitors, hence, a more compact design.

When choosing operating frequency, the most important consideration is thermal limitations. This constraint typically dominates frequency selection. See Figure 10-2 for circuits running at 400 kHz and Figure 10-3 for circuits running at 2.1 MHz. These curves show how much output current can be supported at a given ambient temperature given these switching frequencies. Note that power dissipation is layout-dependent so while these curves are a good starting point, thermal resistance in any design will be different from the estimates used to generate Figure 10-2 and Figure 10-3. The maximum temperature ratings are based on a 100-mm × 80-mm, 4-layer EVM PCB design, LM61460EVM.

GUID-7AA862E1-2B44-4293-B8A8-4FCFFB8C29E9-low.gif
fSW = 400 kHzPCB RθJA = 25°C/WVOUT = 5 V
Figure 10-2 Maximum Ambient Temperature Versus Output Current
GUID-1C4E9007-CBA4-4DD4-BB78-DCD9BF9EBBBF-low.gif
fSW = 2100 kHzPCB RθJA = 25°C/WVOUT = 5 V
Figure 10-3 Maximum Ambient Temperature Versus Output Current

Two other considerations are what maximum and minimum input voltage the part must maintain its frequency setting. Since the LM62440-Q1 adjusts its frequency under conditions in which regulation would normally be prevented by minimum on time or minimum off time, these constraints are only important for input voltages requiring constant frequency operation.

If foldback is undesirable at high input voltage, then use Equation 6:

Equation 6. GUID-7ADA6B0A-3B10-4355-80B5-019847C9A9F7-low.gif

If foldback at low input voltage is a concern, use Equation 7:

Equation 7. GUID-B521A000-200A-443F-9004-17EF284053D6-low.gif

where:

  • GUID-80F5907D-582B-4EE8-A7B2-62CFE2D46908-low.gif

The fourth constraint is the rated frequency range of the IC. See fADJ in Electrical Characteristics. All previously stated constraints (thermal, VIN(MAX2), VIN(MIN2), and device-specified frequency range) must be considered when selecting frequency.

Many applications require that the AM band can be avoided. These applications tend to operate at either 400 kHz below the AM band or 2.1 MHz above the AM band. In this example, 400 kHz is chosen.