SNVSCH2 September   2024 LM65645-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Descriptions
      1. 7.3.1 Output Voltage Selection
      2. 7.3.2 EN Pin and Use as VIN UVLO
      3. 7.3.3 Mode Selection
        1. 7.3.3.1 MODE/SYNC Pin Uses for Synchronization
        2. 7.3.3.2 Clock Locking
      4. 7.3.4 Adjustable Switching Frequency
      5. 7.3.5 Dual Random Spread Spectrum (DRSS)
      6. 7.3.6 Internal LDO, VCC UVLO, and BIAS Input
      7. 7.3.7 Bootstrap Voltage (BST Pin)
      8. 7.3.8 Soft Start and Recovery From Dropout
      9. 7.3.9 Safety Features
        1. 7.3.9.1 Power-Good Monitor
        2. 7.3.9.2 Overcurrent and Short-Circuit Protection
        3. 7.3.9.3 Hiccup
        4. 7.3.9.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
        1. 7.4.2.1 Peak Current Mode Operation
        2. 7.4.2.2 Auto Mode Operation
          1. 7.4.2.2.1 Diode Emulation
        3. 7.4.2.3 FPWM Mode Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Choosing the Switching Frequency
        3. 8.2.2.3 FB for Adjustable or Fixed Output Voltage Mode
        4. 8.2.2.4 Inductor Selection
        5. 8.2.2.5 Output Capacitor Selection
        6. 8.2.2.6 Input Capacitor Selection
        7. 8.2.2.7 CBOOT
        8. 8.2.2.8 External UVLO
        9. 8.2.2.9 Maximum Ambient Temperature
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Ground and Thermal Considerations
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
  • RZT|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2.6 Input Capacitor Selection

The ceramic input capacitors provide a low impedance source to the regulator in addition to supplying the ripple current and isolating switching noise from other circuits. A minimum ceramic capacitance of 2 × 4.7µF is required on the input of the regulator. Place one capacitor on each side of the package and connected directly to the VIN and GND pins of the device. This capacitance must be rated for at least the maximum input voltage that the application requires, preferably twice the maximum input voltage. The value can be increased to help reduce input voltage ripple and maintain the input voltage during load transients. In addition, a high frequency bypass capacitance of 2 × 100nF ceramic capacitor must be used at the input, as close a possible to the regulator. Place one capacitor on each side of the package and connected directly to the VIN and GND pins of the device. This requirement provides a high frequency bypass for the control circuits internal to the device.

For this example, 2 × 4.7µF, 100V, X7R (or better) ceramic capacitors are chosen. The 100nF capacitors must also be rated at 100V with an X7R dielectric.

Using an electrolytic capacitor on the input in parallel with the ceramics is often desirable. This statement is especially true if long leads or traces are used to connect the input supply to the regulator, or an input EMI filter is used. The moderate ESR of this capacitor can help damp any ringing on the input supply caused by any inductance on the input. The use of this additional capacitor also helps with voltage dips caused by input supplies with unusually high impedance.

Most of the input switching current passes through the ceramic input capacitor or capacitors. The approximate RMS value of this current can be calculated from Equation 12 and must be checked against the manufacturers maximum ratings.

Equation 12. LM65645-Q1