SNVSCH2 September   2024 LM65645-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Descriptions
      1. 7.3.1 Output Voltage Selection
      2. 7.3.2 EN Pin and Use as VIN UVLO
      3. 7.3.3 Mode Selection
        1. 7.3.3.1 MODE/SYNC Pin Uses for Synchronization
        2. 7.3.3.2 Clock Locking
      4. 7.3.4 Adjustable Switching Frequency
      5. 7.3.5 Dual Random Spread Spectrum (DRSS)
      6. 7.3.6 Internal LDO, VCC UVLO, and BIAS Input
      7. 7.3.7 Bootstrap Voltage (BST Pin)
      8. 7.3.8 Soft Start and Recovery From Dropout
      9. 7.3.9 Safety Features
        1. 7.3.9.1 Power-Good Monitor
        2. 7.3.9.2 Overcurrent and Short-Circuit Protection
        3. 7.3.9.3 Hiccup
        4. 7.3.9.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
        1. 7.4.2.1 Peak Current Mode Operation
        2. 7.4.2.2 Auto Mode Operation
          1. 7.4.2.2.1 Diode Emulation
        3. 7.4.2.3 FPWM Mode Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Choosing the Switching Frequency
        3. 8.2.2.3 FB for Adjustable or Fixed Output Voltage Mode
        4. 8.2.2.4 Inductor Selection
        5. 8.2.2.5 Output Capacitor Selection
        6. 8.2.2.6 Input Capacitor Selection
        7. 8.2.2.7 CBOOT
        8. 8.2.2.8 External UVLO
        9. 8.2.2.9 Maximum Ambient Temperature
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Ground and Thermal Considerations
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
  • RZT|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

Figure 5-1 20 Pin RZT, WQFN-FCRLF Package (Top View)
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
NC 1 — No connect pin. Leave floating.
PG 2 O Power Good flag output. Open drain output that goes low if VOUT is outside of the specified regulation window.
FB 3 A Feedback configuration pin. Connect to GND to configure 3.3V fixed output voltage. Connect to VCC to configure 5V fixed output voltage. Connect this pin to a feedback divider for adjustable output options. The regulation threshold is 0.8V.
VCC 4 P Internal LDO output. Used as supply to internal control circuits. Do not connect this pin to any external loads. Can be used for logic pull-up to control or flag pins. Connect a high quality 1µF capacitor from this pin to GND.
MODE / SYNC 5 I/O Mode and synchronization input pin. Connect to GND, or drive the pin low to operate in AUTO mode. Connect to VCC, or drive the pin high, or send a synchronization clock signal to operate in FPWM mode. When synchronized to an external clock, use the RT pin to set the internal frequency close to the synchronized frequency.
RT 6 I/O Switching frequency programming pin. Connect this pin to VCC for 400kHz operation, or to GND for 2.2MHz operation. Connect this pin to ground through a resistor to set the switching frequency between 300kHz and 2200kHz. Do not float.
EN / UVLO 7 P Precision enable pin. High = ON, Low = OFF. This pin can be directly connected to VIN. The precision threshold on this input enables use as an adjustable UVLO. Do not float.
NC 8 — No connect pin. Leave floating.
PGND1 9 G Power ground to low-side MOSFET. Connect to system ground. Connect a high-quality bypass capacitor or capacitors between this pin and VIN1.
NC 10 — No connect pin. Leave floating.
VIN1 11 P Input supply to the regulator. Connect high-quality bypass capacitors from this pin to PGND1. Provide a low-impedance connection to VIN2.
NC 12 — No connect pin. Leave floating.
SW1, SW2 13, 14 P Device switch pins. Connect to the output inductor.
BOOT 15 P High-side driver upper supply rail. Connect a high quality 100nF capacitor between the SW node and BOOT. An internal diode charges the capacitor while SW node is low.
NC 16 — No connect pin. Leave floating.
VIN2 17 P Input supply to the regulator. Connect high-quality bypass capacitors from this pin to PGND2. Provide a low-impedance connection to VIN1.
NC 18 — No connect pin. Leave floating.
PGND2 19 G Power ground to internal low-side MOSFET. Connect to system ground. Connect high-quality bypass capacitors between this pin and VIN2.
BIAS 20 P Input to internal voltage regulator. If configured for fixed VOUT, connect this pin to the VOUT node to close the control loop. If configured for an adjustable VOUT, connect this pin to the VOUT node or an external bias supply from 3.3V to 30V. If output voltage is above 30V and no external supply is used, tie the pin to GND.
DAP — G Exposed ground pad. Connect to system GND on the PCB. This pin is a major heat dissipation path for the die. The pad must be used for heat sinking by soldering to the GND copper on a PCB. Implementing as many thermal vias as suggested in the example board layout makes sure of the lowest package thermal resistance and best possible thermal performance.
(1) I = input, O = output, A = Analog, P = Power, G = Ground