SNVSCD4 September   2024 LM70660 , LM706A0

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Input Voltage Range (VIN)
      2. 6.3.2  High-Voltage Bias Supply Regulator (VCC, BIAS, VDDA)
      3. 6.3.3  Enable (EN)
      4. 6.3.4  Power-Good Monitor (PG)
      5. 6.3.5  Switching Frequency (RT)
      6. 6.3.6  Dual Random Spread Spectrum (DRSS)
      7. 6.3.7  Soft Start
      8. 6.3.8  Output Voltage Setpoint (FB)
      9. 6.3.9  Minimum Controllable On-Time
      10. 6.3.10 Error Amplifier and PWM Comparator (FB, EXTCOMP)
      11. 6.3.11 Slope Compensation
      12. 6.3.12 Shunt Current Sensing
      13. 6.3.13 Hiccup Mode Current Limiting
      14. 6.3.14 Device Configuration (CONFIG)
      15. 6.3.15 Single-Output Dual-Phase Operation
      16. 6.3.16 Pulse Frequency Modulation (PFM) / Synchronization
      17. 6.3.17 Thermal Shutdown (TSD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown Mode
      2. 6.4.2 Standby Mode
      3. 6.4.3 Active Mode
      4. 6.4.4 Sleep Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Power Train Components
        1. 7.1.1.1 Buck Inductor
        2. 7.1.1.2 Output Capacitors
        3. 7.1.1.3 Input Capacitors
        4. 7.1.1.4 EMI Filter
      2. 7.1.2 Error Amplifier and Compensation
      3. 7.1.3 Maximum Ambient Temperature
        1. 7.1.3.1 Derating Curves
    2. 7.2 Typical Applications
      1. 7.2.1 Design 1 – High Efficiency, Wide Input, 400kHz Synchronous Buck Regulator
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 7.2.1.2.2 Custom Design With Excel Quickstart Tool
          3. 7.2.1.2.3 Buck Inductor
          4. 7.2.1.2.4 Current-Sense Resistance
          5. 7.2.1.2.5 Output Capacitors
          6. 7.2.1.2.6 Input Capacitors
          7. 7.2.1.2.7 Frequency Set Resistor
          8. 7.2.1.2.8 Feedback Resistors
          9. 7.2.1.2.9 Compensation Components
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Design 2 – High Efficiency 24V to 3.3V 400kHz Synchronous Buck Regulator
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Thermal Design and Layout
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
        1. 8.2.1.1 PCB Layout Resources
        2. 8.2.1.2 Thermal Design Resources
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
7.2.1.2.3 Buck Inductor
  1. Use Equation 30 to calculate the required buck inductance based on a 40% inductor ripple current at nominal input voltages.
    Equation 30. L O   =   V O U T Δ I L O × F S W × 1 - V O U T V I N n o m   =   5 V 3.2 A   × 400 k H z × 1 - 5 V 48 V   =   3.5 µ H
  2. Select a standard inductor value of 3.3µH. Use Equation 31 to calculate the peak inductor currents at maximum steady-state input voltage. Subharmonic oscillation occurs with a duty cycle greater than 50% for peak current-mode control. For design simplification, the LM706x0 has an internal slope compensation ramp proportional to the switching frequency that is added to the current sense signal to damp any tendency toward subharmonic oscillation.
    Equation 31. I L O P K   =   I O U T + ∆ I L O 2   =   I O U T + V O U T 2 × L O × F S W × 1 - V O U T V I N m a x     =   8 A + 5 V 2 × 3.3 µ H × 400 k H z   × 1 - 5 V 60 V   =   9.74 A  
  3. Based on Equation 7, use Equation 32 to cross-check the inductance to set a slope compensation close to the ideal one times the inductor current downslope. The selected 3.3µH has less downslope and is adequate.
    Equation 32. L O ( s c )   =   V O U T × R S 24 × F S W   =   5 V × 5 m Ω   24 × 0.4 M H z   =   2.6 µ H