SNOSDG3 December   2024 LM74681

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and Output Voltage
      2. 7.3.2 Charge Pump
      3. 7.3.3 Gate Driver
      4. 7.3.4 Enable
    4. 7.4 Device Functional Modes
      1. 7.4.1 Conduction Mode
        1. 7.4.1.1 Regulated Conduction Mode
        2. 7.4.1.2 Full Conduction Mode
      2. 7.4.2 Reverse Current Protection Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Design Considerations
        2. 8.2.2.2 MOSFET Selection
        3. 8.2.2.3 Output capacitance
      3. 8.2.3 Application Curves
    3. 8.3 Powered Device for IEEE 802.3bt Class 5-8 (45W-90W) Systems
    4. 8.4 Power Supply Recommendations
      1. 8.4.1 Transient Protection
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

TJ = –40°C to +125°C; typical values at TJ = 25°C, OUTP = 48 V, V(EN) = OUTP, COUT: 1uF over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE
VOUTP OUTP voltage range  30 90 V
VOUT_UVLOR 24.9 27.6 29.5 V
VOUT_UVLOF 24 26.7 28.5 V
VOUT_UVLO_Hyst 0.9 V
IQ Operating Quiescent Current VEN = 3.3V, VOUTP = 48V, IGND 270 450 µA
ISHDN Shutdown Supply Current VEN = 0 V, VOUTP = 48 V 12.8 15 µA
UVLO shutdown current (detection phase)  2.7 V ≤ VOUTP ≤ 10.1 V 0.27 3.8 µA
UVLO shutdown current (classification phase)  10.2 V ≤ VOUTP ≤ 23 V 0.27 3.8 µA
ENABLE INPUT
VEN_IL Enable input low threshold 0.413 0.7 0.96 V
VEN_IH Enable input high threshold 0.631 0.9 1.15
VEN_Hys Enable Hysteresis 0.2 V
IEN Enable pin leakage current V(EN) = 48 V 87 241 nA
VIN to VOUTP
VFWD Threshold for forward conduction 169 195 226 mV
VREV Threshold for reverse current blocking -17 -11 -5 mV
VTG_REG Top side gate drive regulation voltage 7 11 16 mV
VTG_REG_SINK Top side regulation sink current 5 10 16 µA
VTG_FC Full conduction threshold 56 mV
GATE DRIVE
VTGx – VINx Top Gate Drive Voltage 8.7 10 11.1 V
VBGx – VGND Bottom Gate Drive Voltage 11.96 13 13.85 V
ITGx Peak source current VINx – VGND = 100 mV, 
VTGx – VINx = 5 V		 124 165 210 µA
Peak sink current VINx – VGND = –50 mV, 
VTGx – VINx = 5 V		 100 mA
IBGx Peak source current VBGx – VGND = 5 V 2.3 3.7 5 mA
Peak sink current VBGx – VGND = 5 V 80 mA