SNOSD98A May   2020  – December 2020 LM7481-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Charge Pump
      2. 8.3.2 Dual Gate Control (DGATE, HGATE)
        1. 8.3.2.1 Reverse Battery Protection (A, C, DGATE)
        2. 8.3.2.2 Load Disconnect Switch Control (HGATE, OUT)
      3. 8.3.3 Over Voltage Protection and Battery Voltage sensing (VSNS, SW, OV)
      4. 8.3.4 Low Iq Shutdown and Under Voltage Lockout (EN/UVLO)
    4. 8.4 Device Functional Modes
    5. 8.5 Application Examples
      1. 8.5.1 Redundant Supply OR-ing with Inrush Current Limiting, Over Voltage Protection and ON/OFF Control
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical 12-V Reverse Battery Protection Application
      1. 9.2.1  Design Requirements for 12-V Battery Protection
      2. 9.2.2  Automotive Reverse Battery Protection
      3. 9.2.3  Input Transient Protection: ISO 7637-2 Pulse 1
      4. 9.2.4  AC Super Imposed Input Rectification: ISO 16750-2 and LV124 E-06
      5. 9.2.5  Input Micro-Short Protection: LV124 E-10
      6. 9.2.6  Detailed Design Procedure
        1. 9.2.6.1 Design Considerations
        2. 9.2.6.2 Charge Pump Capacitance VCAP
        3. 9.2.6.3 Input and Output Capacitance
        4. 9.2.6.4 Hold-up Capacitance
        5. 9.2.6.5 Over Voltage Protection and Battery Monitor
      7. 9.2.7  MOSFET Selection: Blocking MOSFET Q1
      8. 9.2.8  MOSFET Selection: Hot-Swap MOSFET Q2
      9. 9.2.9  TVS selection
      10. 9.2.10 Application Curves
    3. 9.3 Do's and Don'ts
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
    2. 10.2 TVS Selection for 12-V Battery Systems
    3. 10.3 TVS Selection for 24-V Battery Systems
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Input Transient Protection: ISO 7637-2 Pulse 1

ISO 7637-2 Pulse 1 specifies negative transient immunity of electronic modules connected in parallel with an inductive load when the battery is disconnected. A typical pulse 1 specified in ISO 7637-2 starts with battery disconnection where supply voltage collapses to 0 V followed by –150 V 2 ms applied with a source impedance of 10 Ω at a slew rate of 1 µs on the supply input. LM74810-Q1 blocks reverse current and prevents the output voltage from swinging negative, protecting the rest of the electronic circuits from damage due to negative transient voltage. MOSFET Q1 is quickly turned off within 0.5 µs by fast reverse comparator of LM74810-Q1.

A single bi-directional TVS or two uni-directional TVS are required at the input to clamp the negative transient pulse within the operating maximum voltage across cathode to anode of 85 V and does not violate the MOSFET Q1 drain-source breakdown voltage rating. ISO 7637-2 Pulse 1 performance of LM74810-Q1 is shown in Figure 9-2.

GUID-E1B1933F-03BB-459D-AAD0-102A0A4E6C49-low.pngFigure 9-2 ISO 7637-2 Pulse 1